Electrical and Electronics Commons^™

A Case Study In Cmos Design Scaling For Analog Applications: The Ringamp Ldo, Steven Corum

Masters Theses

As CMOS process nodes scale to smaller feature sizes, process optimizations are made to achieve improvements in digital circuit performance, such as increasing speed and memory, while decreasing power consumption. Unfortunately for analog design, these optimizations usually come at the expense of poorer transistor performance, such as reduced small signal output resistance and increased channel length modulation. The ring amplifier has been proposed as a digital solution to the analog scaling problem, by configuring digital inverters to function as analog amplifiers through deadzone biasing. As digital inverters naturally scale, the ring amplifier is a promising area of exploration for analog …

Design Of A Sigma-Delta Adc In 65nm Cmos Process, Michael Lee Thompson Iii

Electrical Engineering Undergraduate Honors Theses

Analog and digital signals both play a vital role in electrical engineering and the technology of today. As the role of electrical and computer engineers becomes more deeply involved in the development of new technology, an understanding of how these signals are utilized, and what they represent, is a necessity. Due to the inherent limitations involved with analog signals, there is a need for these signals to be accurately and efficiently converted to digital signals for processing. The job of the analog-to-digital converter, or ADC, is to receive this analog input signal (voltage or current) and create a digital representation …

A Ringamp-Assisted, Output Capacitor-Less Analog Cmos Low-Dropout Voltage Regulator, Jordan Sangid

Doctoral Dissertations

Continued advancements in state-of-the-art integrated circuits have furthered trends toward higher computational performance and increased functionality within smaller circuit area footprints, all while improving power efficiencies to meet the demands of mobile and battery-powered applications. A significant portion of these advancements have been enabled by continued scaling of CMOS technology into smaller process node sizes, facilitating faster digital systems and power optimized computation. However, this scaling has degraded classic analog amplifying circuit structures with reduced voltage headroom and lower device output resistance; and thus, lower available intrinsic gain. This work investigates these trends and their impact for fine-grain Low-Dropout (LDO) …

Memory Module Design For High-Temperature Applications In Sic Cmos Technology, Affan Abbasi

Graduate Theses and Dissertations

The wide bandgap (WBG) characteristics of SiC play a significant and disruptive role in the power electronics industry. The same characteristics make this material a viable choice for high-temperature electronics systems. Leveraging the high-temperature capability of SiC is crucial to automotive, space exploration, aerospace, deep well drilling, and gas turbines. A significant issue with the high-temperature operation is the exponential increase in leakage current. The lower intrinsic carrier concentration of SiC (10-9 cm-3) compared to Si (1010 cm-3) leads to lower leakage over temperature. Several researchers have demonstrated analog and digital circuits designed in SiC. However, a memory module is …

Design And Implementation Of A Multi-Modal Sensor With On-Chip Security, Ava Hedayatipour

Doctoral Dissertations

With the advancement of technology, wearable devices for fitness tracking, patient monitoring, diagnosis, and disease prevention are finding ways to be woven into modern world reality. CMOS sensors are known to be compact, with low power consumption, making them an inseparable part of wireless medical applications and Internet of Things (IoT). Digital/semi-digital output, by the translation of transmitting data into the frequency domain, takes advantages of both the analog and digital world. However, one of the most critical measures of communication, security, is ignored and not considered for fabrication of an integrated chip. With the advancement of Moore's law and …

5-Bit Dual-Slope Analog-To-Digital Converter-Based Time-To-Digital Converter Chip Design In Cmos Technology, Jojoe S. Sagoe

LSU Master's Theses

Time-to-Digital Converters (TDC) have gained increasing importance in modern implementations of mixed-signal, data-acquisition and processing interfaces and are used to perform high precision time intervals in systems that incorporate Time-of-Flight (ToF) or Time-of-Arrival (ToA) measurements. The linearity of TDCs is very crucial since most Digital Signal Processing (DSP) systems require very linear inputs to achieve high accuracy.

In this work, a TDC has been designed in the 0.5 μm n-well CMOS process that can be used for on-chip integration and in applications requiring high linearity. This TDC used a Dual-Slope-ADC-based architecture for the time-to-digital conversion and consists of the following …

Cmos Radioactive Isotope Identification With Multichannel Analyzer And Embedded Neural Network, Samuel Murray

Department of Electrical and Computer Engineering: Dissertations, Theses, and Student Research

A radiation detection and identification system is designed and implemented to perform gamma ray spectroscopy on radioactive sources and identify which isotopes are present in the sources. A multichannel analyzer is implemented on an ASIC to process the signal produced from gamma rays detected by a scintillator and photomultiplier tube and to quantize the gamma ray energies to build a histogram. A fast, low memory embedded neural network is implemented on a microcontroller ASIC to identify the isotopes present in the gamma ray histogram produced by the multichannel analyzer in real time.

Advisors: Sina Balkir and Michael Hoffman

An Analog Cmos Particle Filter, Trevor Watson

Masters Theses

Particle filters are used in a variety of image processing and machine learning applications. Their main use in these applications is to gather information about a system of objects, by using partial or noisy observations collected from sensors. These observations are used to associate points of interest in the observations with objects and maintain this association through a series of observations.

In this paper I will investigate the performance of a particle filter implemented in 130nm analog CMOS hardware. The design goal of the particle filter is low-microwatt power consumption. Using analog hardware, rather than digital ASICs or CPUs I …

Design And Implementation Of A Low‐Power Wireless Respiration Monitoring Sensor, Ifana Mahbub

Doctoral Dissertations

Wireless devices for monitoring of respiration activities can play a major role in advancing modern home-based health care applications. Existing methods for respiration monitoring require special algorithms and high precision filters to eliminate noise and other motion artifacts. These necessitate additional power consuming circuitry for further signal conditioning. This dissertation is particularly focused on a novel approach of respiration monitoring based on a PVDF-based pyroelectric transducer. Low-power, low-noise, and fully integrated charge amplifiers are designed to serve as the front-end amplifier of the sensor to efficiently convert the charge generated by the transducer into a proportional voltage signal. To transmit …

Design Of An Active Harmonic Rejection N-Path Filter For Highly Tunable Rf Channel Selection, Craig J. Fischer

Master's Theses

As the number of wireless devices in the world increases, so does the demand for flexible radio receiver architectures capable of operating over a wide range of frequencies and communication protocols. The resonance-based channel-select filters used in traditional radio architectures have a fixed frequency response, making them poorly suited for such a receiver. The N-path filter is based on 1960s technology that has received renewed interest in recent years for its application as a linear high Q filter at radio frequencies. N-path filters use passive mixers to apply a frequency transformation to a baseband low-pass filter in order to achieve …

A Sub-Threshold Low-Power Integrated Bandpass Filter For Highly-Integrated Spectrum Analyzers, Benjamin David Roehrs

Masters Theses

Low-power analog filter banks provide frequency analysis with minimal space requirements, making them viable solutions for integrated remote audio- and vibration-sensing applications. In order to achieve a balance between the length of deployable service and system performance, a critical requirement of such remote sensor networks is low-power consumption, due to the constraints imposed by on-board battery cells.

In this work, the design and implementation of a sub-threshold complementary metal-oxide semiconductor (CMOS) integrated low-power tunable analog filter channel for Oak Ridge National Laboratory is presented. Project specifications required a tunable, high-order, monolithic bandpass filter channel with small chip area and low …

Cmos Programmable Time Control Circuit Design For Phased Array Uwb Ground Penetrating Radar Antenna Beamforming, Nicholas James Reilly

Graduate College Dissertations and Theses

Phased array radar systems employ multiple antennas to create a radar beam that can be steered electronically. By manipulating the relative phase values of feeding signals among different antennas, the effective radiation pattern of the array can be synthesized to enhance the main lobe in a desired direction while suppressing the undesired side lobes in other directions. Hence the radar scanning angles can be electronically controlled without employing the bulky mechanical gimbal structure, which can significantly reduce radar system size, weight and power consumption. In recent years, phased array technologies have received great attentions and are explored in developing many …

Study Of Millisecond Laser Annealing On Ion Implanted Soi And Application To Scaled Finfet Technology, Tyler J. Michalak

Legacy Theses & Dissertations (2009 - 2024)

The fabrication of metal-oxide-semiconductor field effect transistors (MOSFET) requires the engineering of low resistance, low leakage, and extremely precise p-n junctions. The introduction of finFET technology has introduced new challenges for traditional ion implantation and annealing techniques in junction design as the fin widths continue to decrease for improved short channel control. This work investigates the use of millisecond scanning laser annealing in the formation of n-type source/drain junctions in next generation MOSFET.

Low Voltage Cmos Sar Adc Design, Ryan Hunt

Electrical Engineering

This project centers on the design of a single ended 10-bit successive approximation register analog to digital converter (SAR ADC for short) that easily interfaces to a micro-controller, such as an Arduino. With micro-controller interfacing in mind, the universal data transfer technique of SPI proved an easy way to communicate between the ADC and the micro-controller. The ADC has a range of 1V (highest code value) to 0V (lowest code value) and operates from a single voltage rail value of 1.8V. Typical SPI clock speeds run on the order of 2MHz and with a 10-bit ADC this means a sampling …

Design Of Analog Cmos Circuits For Batteryless Implantable Telemetry Systems, Kyle G. A. De Gannes

Electronic Thesis and Dissertation Repository

A wireless biomedical telemetry system is a device that collects biomedical signal measurements and transmits data through wireless RF communication. Testing medical treatments often involves experimentation on small laboratory animals, such as genetically modified mice and rats. Using batteries as a power source results in many practical issues, such as increased size of the implant and limited operating lifetime. Wireless power harvesting for implantable biomedical devices removes the need for batteries integrated into the implant. This will reduce device size and remove the need for surgical replacement due to battery depletion. Resonant inductive coupling achieves wireless power transfer in a …

Characterization And Implementation Of An Injection Locked Frequency Divider Based On Relaxation Oscillator, Kai Zhu

Doctoral Dissertations

There has been a dramatic increase in wireless awareness among the user community in the past few years. As the wireless communication devices require more integration in terms of both hardware and software, the low-power integrated circuit (IC) solution has gained higher dedication and will dominate in the future radio-frequency IC (RFIC) design. Complementary Metal-Oxide Semiconductor (CMOS) process is extremely attractive for such applications because of its low cost and the possibility to integrate baseband and high frequency circuits on the same chip. The transceiver is often the most power-hungry block in a wireless communication system. The frequency divider (prescaler) …

A Simple Class-Ab Transconductor In Cmos, Bradley Minch

Bradley Minch

In this paper, we present a simple class-AB CMOS transconductor, which is based on Delbriick's bump/antibump circuit, whose differential output current is an expansive nonlinear function of its differential-mode input voltage. We describe the operation of the new transconductor qualitatively and derive an analytical model of its output currents from the Enz-Krummenacher-Vittoz (EKV) model of the MOS transistor. We also provide experimental measurements of the DC transfer characteristics of a version of the circuit that was fabricated in a 0.5-mumCMOS process through MOSIS.

Body-Biased Vco Tunes 12 To 16 Ghz, M. Moghavvemi, Hossein Ameri Mahabadi, A. Attaran

Hossein Ameri Mahabadi

This body-biased voltage-controlled oscillator provides reasonably good phase-noise performance over a broad tuning range with relatively low power consumption and low jitter timing noise in the time domain.

Tin/Hfo2/Sio2/Si Gate Stacks Reliability : Contribution Of Hfo2 And Interfacial Sio2 Layer, Nilufa Rahim

Dissertations

Hafnium Oxide based gate stacks are considered to be the potential candidates to replace SiO₂ in complementary metal-oxide-semiconductor (CMOS), as they reduce the gate leakage by over 100 times while keeping the device performance intact. Even though considerable performance improvement has been achieved, reliability of high-κ devices for the next generation of transistors (45nm and beyond) which has an interfacial layer (IL: typically SiO₂) between high-κ and the substrate, needs to be investigated. To understand the breakdown mechanism of high-κ/SiO₂ gate stack completely, it is important to study this multi-layer structure extensively. For example, (i) the …

Switch-Less Dual-Frequency Reconfigurable Cmos Oscillator Using One Single Piezoelectric Aln Mems Resonator With Co-Existing S0 And S1 Lamb-Wave Modes, Chengjie Zuo, Jan Van Der Spiegel, Gianluca Piazza

Chengjie Zuo

For the first time, this work demonstrates a switch-less dual-frequency (472-MHz and 1.94-GHz) reconfigurable CMOS oscillator using a single piezoelectric AlN MEMS resonator with co-existing S0 and S1 Lamb-wave modes of vibration. High performances (high Q and kt2 for a resonator and low phase noise for an oscillator) have been achieved for both the resonator and oscillator in terms of dual-mode operation. Especially, the 1.94-GHz operation has the best phase noise performance when compared with all previously reported CMOS oscillators that work at a similar frequency.

A High -Temperature, High-Voltage, Fast Response Time Linear Regulator In 0.8um Bcd-On-Soi, Chia Hung Su

Doctoral Dissertations

The sale of hybrid electric vehicles (HEVs) has increased tenfold from the year 2001 to 2009 [1]. With this the demand for high temperature electronics has also increased dramatically making, high temperature electronics for HEV applications desirable in the engine compartment, power train, and brakes where the ambient temperature normally exceeds 150°C. Power converters (i.e. DC-DC converter, DC-AC inverter) inside the HEVs require gate drivers to control the power switches. An integrated gate driver circuit has been realized in 0.8-um BCD-on-SOI process. This gate driver IC needs a step-down voltage regulator to convert the unregulated high input DC voltage (VDDH) …

12 Bit Charge Redistribution Digital To Analog Converter For The Residence Time Fluxgate Magnetometer, Miguel Angel Alamillo

Open Access Theses & Dissertations

The continuous advances in CMOS VLSI technology have culminated in high speed, low voltage CMOS digital circuits with gate delays below 50 ps at 1.5 V supply. At the same time, high voltage analog signal processing has fallen behind to the high flexibility and high reliability of DSP. However, the main drawback of DSP is the need for high accuracy low distortion data converters and as a consequence of the persistent efforts of reducing size, cost and power of solid-state components the field of CMOS Mixed-Signal circuit design has become of the utmost importance.

The obvious functionality of data converters …

Vlsi Implementation Of Novel Class Of High Speed Pipelined Digital Signal Processing Filter For Wireless Receivers, Rozita Teymourzadeh, Yazan Samir, Shabuil Islam, Masuri Othman, Mok Vh

Dr. Rozita Teymourzadeh, CEng.

Design And Characterization Of Noveldevices For New Generation Of Electrostaticdischarge (Esd) Protection Structures, Javier Salcedo

Electronic Theses and Dissertations

The technology evolution and complexity of new circuit applications involve emerging reliability problems and even more sensitivity of integrated circuits (ICs) to electrostatic discharge (ESD)-induced damage. Regardless of the aggressive evolution in downscaling and subsequent improvement in applications' performance, ICs still should comply with minimum standards of ESD robustness in order to be commercially viable. Although the topic of ESD has received attention industry-wide, the design of robust protection structures and circuits remains challenging because ESD failure mechanisms continue to become more acute and design windows less flexible. The sensitivity of smaller devices, along with a limited understanding of the …

Study Of Nanoscale Cmos Device And Circuit Reliability, Chuanzhao Yu

Electronic Theses and Dissertations

The development of semiconductor technology has led to the significant scaling of the transistor dimensions -The transistor gate length drops down to tens of nanometers and the gate oxide thickness to 1 nm. In the future several years, the deep submicron devices will dominate the semiconductor industry for the high transistor density and the corresponding performance enhancement. For these devices, the reliability issues are the first concern for the commercialization. The major reliability issues caused by voltage and/or temperature stress are gate oxide breakdown (BD), hot carrier effects (HCs), and negative bias temperature instability (NBTI). They become even more important …