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Poor Man’S Trace Cache: A Variable Delay Slot Architecture, Tino C. Moore
Poor Man’S Trace Cache: A Variable Delay Slot Architecture, Tino C. Moore
Dissertations, Master's Theses and Master's Reports
We introduce a novel fetch architecture called Poor Man’s Trace Cache (PMTC). PMTC constructs taken-path instruction traces via instruction replication in static code and inserts them after unconditional direct and select conditional direct control transfer instructions. These traces extend to the end of the cache line. Since available space for trace insertion may vary by the position of the control transfer instruction within the line, we refer to these fetch slots as variable delay slots. This approach ensures traces are fetched along with the control transfer instruction that initiated the trace. Branch, jump and return instruction semantics as well as …