Computer Sciences Commons^™

Rt-Openstack: A Real-Time Cloud Management System, Sisu Xi, Chong Li, Chenyang Lu, Christopher D. Gill, Meng Xu, Linh T.X. Phan, Insup Lee, Oleg Sokolsky

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Clouds have become appealing platforms for running not only general-purpose applications but also real-time applications. However, current clouds cannot provide real-time performance for virtual machines (VM) for two reasons: (1) the lack of a real-time virtual machine monitor (VMM) scheduler on a single host, and (2) the lack of a real-time aware VM placement scheme by the cloud manager. While real-time VM schedulers do exist, prior solutions employ either heuristics-based approaches that cannot always achieve predictable latency or apply real-time scheduling theory that may result in low CPU utilization. We observe the demand and advantage for co-hosting real-time (RT) VMs …

Streaming Computations With Precise Control, Peng Li, Kunal Agrawal, Jeremy Buhler, Roger Chamberlain

All Computer Science and Engineering Research

No abstract provided.

Cloudpowercap: Integrating Power Budget And Resource Management Across A Virtualized Server Cluster, Yong Fu, Anne Holler, Chenyang Lu

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In many datacenters, server racks are highly underutilized. Rack slots are left empty to keep the sum of the server nameplate maximum power below the power provisioned to the rack. And the servers that are placed in the rack cannot make full use of available rack power. The root cause of this rack underutilization is that the server nameplate power is often much higher than can be reached in practice. To address rack underutilization, server vendors are shipping support for per-host power caps, which provide a server-enforced limit on the amount of power that the server can draw. Using this …

An Algorithm For Triangulating 3d Polygons, Ming Zou

All Theses and Dissertations (ETDs)

In this thesis, we present an algorithm for obtaining a triangulation of multiple, non-planar 3D polygons. The output minimizes additive weights, such as the total triangle areas or the total dihedral angles between adjacent triangles. Our algorithm generalizes a classical method for optimally triangulating a single polygon. The key novelty is a mechanism for avoiding non-manifold outputs for two and more input polygons without compromising opti- mality. For better performance on real-world data, we also propose an approximate solution by feeding the algorithm with a reduced set of triangles. In particular, we demonstrate experimentally that the triangles in the Delaunay …

Learning With Single View Co-Training And Marginalized Dropout, Minmin Chen

All Theses and Dissertations (ETDs)

The generalization properties of most existing machine learning techniques are predicated on the assumptions that 1) a sufficiently large quantity of training data is available; 2) the training and testing data come from some common distribution. Although these assumptions are often met in practice, there are also many scenarios in which training data from the relevant distribution is insufficient. We focus on making use of additional data, which is readily available or can be obtained easily but comes from a different distribution than the testing data, to aid learning.

We present five learning scenarios, depending on how the distribution we …

Kernel Density Metric Learning, Yujie He, Wenlin Chen, Yixin Chen

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This paper introduces a supervised metric learning algorithm, called kernel density metric learning (KDML), which is easy to use and provides nonlinear, probability-based distance measures. KDML constructs a direct nonlinear mapping from the original input space into a feature space based on kernel density estimation. The nonlinear mapping in KDML embodies established distance measures between probability density functions, and leads to correct classification on datasets for which linear metric learning methods would fail. Existing metric learning algorithms, such as large margin nearest neighbors (LMNN), can then be applied to the KDML features to learn a Mahalanobis distance. We also propose …

Parallel Real-Time Scheduling Of Dags, Abusayeed Saifullah, David Ferry, Jing Li, Kunal Agrawal, Chenyang Lu, Christopher Gill

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Recently, multi-core processors have become mainstream in processor design. To take full advantage of multi-core processing, computation-intensive real-time systems must exploit intra-task parallelism. In this paper, we address the open problem of real-time scheduling for a general model of deterministic parallel tasks, where each task is represented as a directed acyclic graph (DAG) with nodes having arbitrary execution requirements. We prove processor-speed augmentation bounds for both preemptive and non-preemptive real-time scheduling for general DAG tasks on multi-core processors. We first decompose each DAG into sequential tasks with their own release times and deadlines. Then we prove that these decomposed tasks …

Scanner: An Efficient And Accurate Trimming Tool For Illumina Next Generation Sequencing Reads, Xiang Zhou

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Recent advances in High-Throughput Sequencing (HTS) technology have greatly facilitated the researches in bioinformatics field. With the ultra-high sequencing speed and improved base-calling accuracy, Illumina Genome Analyzer is currently the most widely used platform in the field. To use the raw reads generated from the sequencing machine, the 3’ adapter sequence attached to the real read in the process of ligation needs to be correctly trimmed. This is often done by some inhouse scripts or different packages with various parameters. They either use the Smith-Waterman algorithm or search for an exact match of the 3’ adapter sequence. In this report, …

Simple Analytic Performance Models For Streaming Data Applications Deployed On Diverse Architectures, Jonathan C. Beard, Roger D. Chamberlain, Mark A. Franklin

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Modern hardware is inherently heterogeneous. With heterogeneity comes multiple abstraction layers that hide underlying complex systems. While hidden, this complexity makes quantitative performance modeling a difficult task. Designers of high-performance streaming applications for heterogeneous systems must contend with unpredictable and often non-generalizable models to predict performance of a particular application and hardware mapping. This paper outlines a computationally simple approach that can be used to model the overall throughput and buffering needs of a streaming application on heterogeneous hardware. The model presented is based upon a hybrid maximum flow and decomposed discrete queueing model. The utility of the model is …

Ewa Model With Recency Effect And Limited Memory, Hang Xie

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Game theory is an important field in economics; it studies how people make decisions amid conflict and cooperation. Various experiments have been carried to study the way people play those games, and economists study those data for various purposes. There has been a rise of need for using artificial agents to simulate the game, since we could save the cost of hiring human subjects for the experiments, and we could gain more control over the experiment settings.

Self-Adapting Mac Layer For Wireless Sensor Networks, Mo Sha, Meng Xu, Chenyang Lu, Linh T.X. Phan, Tae-Suk Kim, Taerim Park

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The integration of wireless sensors with mobile phones is gaining momentum as an enabling platform for numerous emerging applications. These mobile systems face dynamic environments where both application requirements and ambient wireless conditions change frequently. Despite the existence of many MAC protocols however, none can provide optimal performance along multiple dimensions, in particular when the conditions are frequently changing. Instead of pursuing a one-MAC-fit all approach we present a Self-Adapting MAC Layer (SAML) comprising (1) a Reconfigurable MAC Architecture (RMA) that can switch to different MAC protocols at run time and (2) a learning-based MAC Selection Engine that selects the …

Real-Time Multi-Core Virtual Machine Scheduling In Xen, Sisu Xi, Meng Xu, Chenyang Lu, Linh T.X. Phan, Christopher Gill, Olga Sokolsky, Insup Lee

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Recent years have witnessed two major trends in the development of complex real-time systems. First, to reduce cost and enhance flexibility, multiple systems are sharing common computing platforms via virtualization technology, instead of being deployed separately on physically isolated hosts. Second, multicore processors are increasingly being used in real-time systems. The integration of real-time systems as virtual machines (VMs) atop common multicore platforms raises significant new research challenges in meeting the real-time performance requirements of multiple systems.

Automated Color Calibration Of Display Devices, Andrew Shulman

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If you compare two identical images on two different monitors, they will likely appear different. Every display device is supposed to adhere to a particular set of standards regulating the color and intensity of the image it outputs. However, in practice, very few do. Color calibration is the practice of modifying the signal path such that the colors produced more closely match reference standards. This is essential for graphics professionals who are mastering original content. They must ensure that the source material appears correct when viewed on a reference monitor. When viewed on a consumer panel, however, some error will …

Efficient Parallel Real-Time Upsampling Of Ultrasound Vectors, William D. Richard Ph.D.

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Upsampling is required prior to the summation step in most receive digital beamforming implementations to produce an accurate summed RF line or vector. This is true in both annular and linear array systems where receive echos are digitized first and then time delayed in the digital domain to achieve proper signal alignment. The efficient, parallel, real-time upsampling circuit presented here produces M upsampled values per ADC clock, where M is the desired upsampling factor. A circuit implementation that upsamples by a factor of M=4 is presented as an example of the more general technique.

Adding Data Parallelism To Streaming Pipelines For Throughput Optimization, Peng Li, Kunal Agrawal, Jeremy Buhler, Roger D. Chamberlain

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The streaming model is a popular model for writing high-throughput parallel applications. A streaming application is represented by a graph of computation stages that communicate with each other via FIFO channels. In this report, we consider the problem of mapping streaming pipelines — streaming applications where the graph is a linear chain — in order to maximize throughput. In a parallel setting, subsets of stages, called components can be mapped onto different computing resources. The through-put of an application is determined by the throughput of the slowest component. Therefore, if some stage is much slower than others, then it may …

Correction Of An Augmentation Bound Analysis For Parallel Real-Time Tasks, Abusayeed Saifullah, Kunal Agrawal, Chenyang Lu, Christopher Gill

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This paper proposes some significant corrections in a recent work of Lakshmanan et al on parallel task scheduling. Lakshmanan et al have proposed a transformation of parallel tasks into sequential tasks, and have claimed a resource augmentation bound of 3:42 for partitioned deadline monotonic (DM) scheduling of the transformed tasks. We demonstrate that their analysis for resource augmentation bound is incorrect. We propose a different technique for task transformation that requires a resource augmentation bound of 5 for partitioned DM scheduling.

Real-Time Scheduling Of Parallel Tasks Under A General Dag Model, Abusayeed Saifullah, David Ferry, Chenyang Lu, Christopher Gill

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Due to their potential to deliver increased performance over single-core processors, multi-core processors have become mainstream in processor design. Computation-intensive real-time systems must exploit intra-task parallelism to take full advantage of multi-core processing. However, existing results in real-time scheduling of parallel tasks focus on restrictive task models such as the synchronous model where a task is a sequence of alternating parallel and sequential segments, and parallel segments have threads of execution that are of equal length. In this paper, we address a general model for deterministic parallel tasks, where a task is represented as a DAG with different nodes having …

Delaunay-Restricted Optimal Triangulation Of 3d Polygons, Ming Zou, Tao Ju, Nathan Carr

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Triangulation of 3D polygons is a well studied topic of research. Existing methods for finding triangulations that minimize given metrics (e.g., sum of triangle areas or dihedral angles) run in a costly O(n4) time [BS95,BDE96], while the triangulations are not guaranteed to be free of intersections. To address these limitations, we restrict our search to the space of triangles in the Delaunay tetrahedralization of the polygon. The restriction allows us to reduce the running time down to O(n2) in practice (O(n3) worst case) while guaranteeing that the solutions are intersection free. We demonstrate experimentally that the reduced search space is …

Building A Skeleton Of A Human Hand Using Microsoft Kinect, Jed Jackoway

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The goal of the project was to reconstruct the skeleton of a Microsoft Kinect user’s hand. Out of the box, Kinect reconstruct the skeleton of users’ bodies, but it only does large joints, such that the hand is given a location on the general skeleton, but the specifics of the fingers and fist are not actually calculated.

Foveon F13 Camera, David Shelley

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Most high-fidelity digital cameras currently available obtain their images using technology where individual pixels can only acquire a single color. Since the acquisition of multiple colors is necessary to capture a full colored image, picture resolution is lost due to difficulties in interpolation between non-adjacent, same color pixels. The resulting unsharp images create the need to find a new way to obtain these images without requiring interpolation between adjacent pixels. An innovative method to capture images with individual pixel cells consisting of three layers of photodetectors stacked vertically upon one another has been created to rectify this problem, but no …

The Clear Channel Prior, Devorah Langsam

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Capturing imagery from outdoor cameras provides a large amount of information about a scene. The true surface appearances of elements in a scene, however, are often incorrectly represented in images. To get a better representation of the scene it is necessary to separate the effects of the underlying reflectance, illumination, and fog in the image. The goal of the dark channel prior is to eliminate the effects of haze in outdoor images and recover the true surface reflectance image for the scene.

Youpon, Garrison Prinslow

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This project was motivated by two related ideas: what can be learned about the unique issues involved with developing cloud-based mobile applications; and, what application could be developed to evaluate these characteristics that would also be innovative and provide value to users. After vetting ideas for the latter objective, it was clear that a new digital coupon system could offer value and apply interesting technologies to computer science problems, such as shortest path calculation, position-aware authentication, game theory, and statistical reasoning. A brief summary of the motivation for developing the new digital coupon system follows.

Accounting For Failures In Delay Analysis For Wirelesshart Networks , Abusayeed Saifullah, Paras Babu Tiwari, Bo Li, Chenyang Lu [email protected]

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WirelessHART networks are gaining ground as a real-time communication infrastructure in industrial wireless control systems. Because wireless communication is often susceptible to transmission failures in industrial environments, it is essential to account for failures in the delay analysis for realtime flows between sensors and actuators in process control. WirelessHART networks handle transmission failures through retransmissions using dedicated and shared time slots through different paths in the routing graphs. While these mechanisms for handling transmission failures are critical for process control requiring reliable communication, they introduce substantial challenges to worst-case end-to-end delay analysis for real-time flows. This paper presents the first …

Just Draw It! A 3d Sketching System, Cindy Grimm, Pushkar Joshi

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We present a system for sketching in 2D to create 3D curves. The interface is light-weight, pen-based, and based on observations of how artists sketch on paper.

An Integrated Data Mining Approach To Real-Time Clinical Monitoring And Deterioration Warning, Yi Mao, Wenlin Chen, Yixin Chen, Chenyang Lu

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Clinical study found that early detection and intervention are essential for preventing clinical deterioration in patients, for patients both in intensive care units (ICU) as well as in general wards but under real-time data sensing (RDS). In this paper, we develop an integrated data mining approach to give early deterioration warnings for patients under real-time monitoring in ICU and RDS. Existing work on mining real-time clinical data often focus on certain single vital sign and specific disease. In this paper, we consider an integrated data mining approach for general sudden deterioration warning. We synthesize a large feature set that includes …

Ride: A Mixed-Mode Control Interface For Mobile Robot Teams, Erik Karulf, Marshall Strother, Parker Dunton, William D. Smart

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There is a growing need for robot control interfaces that allow a single user to effectively control a large number of mostly-autonomous robots. The challenges in controlling such a collection of robots are very similar to the challenges of controlling characters in some genres of video games. In this paper, we argue that interfaces based on elements from computer video games are effective tools for the control of large robot teams. We present RIDE, the Robot Interactive Display Environment, an example of such an interface, and give the results of initial user studies with the interface, which lend support to …

A Memory Access Model For Highly-Threaded Many-Core Architectures, Lin Ma, Kunal Agrawal, Roger D. Chamberlain

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Many-core architectures are excellent in hiding memory-access latency by low-overhead context switching among a large number of threads. The speedup of algorithms carried out on these machines depends on how well the latency is hidden. If the number of threads were infinite, then theoretically these machines should provide the performance predicted by the PRAM analysis of the programs. However, the number of allowable threads per processor is not infinite. In this paper, we introduce the Threaded Many-core Memory (TMM) model which is meant to capture the important characteristics of these highly-threaded, many-core machines. Since we model some important machine parameters …

Data Collection And Performance Monitoring Of Real-Time Parallel Systems , Mahesh Mahadevan

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Instrumentation and log data monitoring are important features present in many different applications today that are used in analysis of a system behaviour. They are largely used in collection of key information from the system which might allow us to describe or establish certain facts about the behavior of the system. Instrumentation in any application usually comes along with its overheads. In some cases , code for instrumentation might become more expensive on the underlying resources than the application itself. For many applications, especially real-time applications , this overhead can cause serious and often catastrophic system failures. Collecting useful information …

A 3d Selection & Query Tool For The Geneatlas Project, Donald Mccurdy

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In this project, I present an application to view, interact with, and search 3D medical volumes as part of the GeneAtlas project.

Common Dma Engine Interface, Roger Alessi

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Circuit boards with Field Programmable Gate Arrays (FPGAs) have a historically diverse set of standards for communicating with other devices. This provides a challenge for developers creating FPGA applications and makes migration of applications from one board or FPGA to another difficult. Many board manufacturers, including Xilinx and GiDEL, create boards with Peripheral Component Interconnect Express (PCIe) buses. PCIe provides a low-level standard for transferring data between a Central Processing Unit (CPU) and an FPGA, and these manufacturers have designed Direct Memory Access (DMA) engines to implement the standard. However, each manufacturer’s DMA engines do not share a standard interface, …