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Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems

Security Of Hardware Accelerators In Multi-Tenant Fpga Environments, Shayan Moini Feb 2023

Security Of Hardware Accelerators In Multi-Tenant Fpga Environments, Shayan Moini

Doctoral Dissertations

Field-programmable gate arrays (FPGAs) play an important role in the acceleration of computationally expensive algorithms for machine learning, aerospace, and ASIC prototyping. The emergence of FPGAs in the cloud (cloud FPGAs) has accelerated FPGA adoption in various applications due to their low initial cost and the ability to quickly prototype a design. Multi-tenancy, in which multiple users execute circuitry in the same FPGAs simultaneously with logical isolation, reduces cloud FPGA usage cost and increases FPGA utilization. Multi-tenancy introduces new security challenges, such as remote side-channel and fault injection attacks, that cannot be addressed with traditional countermeasures against attacks. In this …


On Improving Robustness Of Hardware Security Primitives And Resistance To Reverse Engineering Attacks, Vinay C. Patil Oct 2021

On Improving Robustness Of Hardware Security Primitives And Resistance To Reverse Engineering Attacks, Vinay C. Patil

Doctoral Dissertations

The continued growth of information technology (IT) industry and proliferation of interconnected devices has aggravated the problem of ensuring security and necessitated the need for novel, robust solutions. Physically unclonable functions (PUFs) have emerged as promising secure hardware primitives that can utilize the disorder introduced during manufacturing process to generate unique keys. They can be utilized as \textit{lightweight} roots-of-trust for use in authentication and key generation systems. Unlike insecure non-volatile memory (NVM) based key storage systems, PUFs provide an advantage -- no party, including the manufacturer, should be able to replicate the physical disorder and thus, effectively clone the PUF. …


A Secure Architecture For Defense Against Return Address Corruption, Grayson J. Bruner May 2021

A Secure Architecture For Defense Against Return Address Corruption, Grayson J. Bruner

Masters Theses

The advent of the Internet of Things has brought about a staggering level of inter-connectivity between common devices used every day. Unfortunately, security is not a high priority for developers designing these IoT devices. Often times the trade-off of security comes at too high of a cost in other areas, such as performance or power consumption. This is especially prevalent in resource-constrained devices, which make up a large number of IoT devices. However, a lack of security could lead to a cascade of security breaches rippling through connected devices. One of the most common attacks used by hackers is return …


Enabling Iot Authentication, Privacy And Security Via Blockchain, Md Nazmul Islam Apr 2021

Enabling Iot Authentication, Privacy And Security Via Blockchain, Md Nazmul Islam

Doctoral Dissertations

Although low-power and Internet-connected gadgets and sensors are increasingly integrated into our lives, the optimal design of these systems remains an issue. In particular, authentication, privacy, security, and performance are critical success factors. Furthermore, with emerging research areas such as autonomous cars, advanced manufacturing, smart cities, and building, usage of the Internet of Things (IoT) devices is expected to skyrocket. A single compromised node can be turned into a malicious one that brings down whole systems or causes disasters in safety-critical applications. This dissertation addresses the critical problems of (i) device management, (ii) data management, and (iii) service management in …


Design Of Hardware With Quantifiable Security Against Reverse Engineering, Shahrzad Keshavarz Mar 2020

Design Of Hardware With Quantifiable Security Against Reverse Engineering, Shahrzad Keshavarz

Doctoral Dissertations

Semiconductors are a 412 billion dollar industry and integrated circuits take on important roles in human life, from everyday use in smart-devices to critical applications like healthcare and aviation. Saving today's hardware systems from attackers can be a huge concern considering the budget spent on designing these chips and the sensitive information they may contain. In particular, after fabrication, the chip can be subject to a malicious reverse engineer that tries to invasively figure out the function of the chip or other sensitive data. Subsequent to an attack, a system can be subject to cloning, counterfeiting, or IP theft. This …


The Effect Of Power Supply Ramp Time On Sram Puf's, Abdelrahman T. Elshafiey Mr. Apr 2017

The Effect Of Power Supply Ramp Time On Sram Puf's, Abdelrahman T. Elshafiey Mr.

Electrical and Computer Engineering ETDs

Physical unclonable functions (PUFs) are security primitives that exploit the device mismatches. PUFs are a promising solution for hardware cryptography and key storage. They are used in many security applications including identification, authentication and key generation. SRAM is one of the popular implementations of PUFs. SRAM PUFs offer the advantage, over other PUF constructions, of reusing resources (memories) that already exist in many designs.

In this thesis, for the first time, it is demonstrated that the start-up value of an SRAM PUF could be different depending on the SRAM power supply rising time. An analytical model has been developed to …


Intrinsic Functions For Securing Cmos Computation: Variability, Modeling And Noise Sensitivity, Xiaolin Xu Nov 2016

Intrinsic Functions For Securing Cmos Computation: Variability, Modeling And Noise Sensitivity, Xiaolin Xu

Doctoral Dissertations

A basic premise behind modern secure computation is the demand for lightweight cryptographic primitives, like identifier or key generator. From a circuit perspective, the development of cryptographic modules has also been driven by the aggressive scalability of complementary metal-oxide-semiconductor (CMOS) technology. While advancing into nano-meter regime, one significant characteristic of today's CMOS design is the random nature of process variability, which limits the nominal circuit design. With the continuous scaling of CMOS technology, instead of mitigating the physical variability, leveraging such properties becomes a promising way. One of the famous products adhering to this double-edged sword philosophy is the Physically …


On Physical Disorder Based Hardware Security Primitives, Arunkumar Vijayakumar Nov 2016

On Physical Disorder Based Hardware Security Primitives, Arunkumar Vijayakumar

Doctoral Dissertations

With CMOS scaling extending transistors to nanometer regime, process variations from manufacturing impacts modern IC design. Fortunately, such variations have enabled an emerging hardware security primitive - Physically Unclonable Function. Physically Unclonable Functions (PUFs) are hardware primitives which utilize disorder from manufacturing variations for their core functionality. In contrast to insecure non-volatile key based roots-of-trust, PUFs promise a favorable feature - no attacker, not even the PUF manufacturer can clone the disorder and any attempt at invasive attack will upset that disorder. Despite a decade of research, certain practical problems impede the widespread adoption of PUFs. This dissertation addresses the …


Design And Evaluation Of Fpga-Based Hybrid Physically Unclonable Functions, Sasan Khoshroo May 2013

Design And Evaluation Of Fpga-Based Hybrid Physically Unclonable Functions, Sasan Khoshroo

Electronic Thesis and Dissertation Repository

A Physically Unclonable Function (PUF) is a new and promising approach to provide security for physical systems and to address the problems associated with traditional approaches. One of the most important performance metrics of a PUF is the randomness of its generated response, which is presented via uniqueness, uniformity, and bit-aliasing. In this study, we implement three known PUF schemes on an FPGA platform, namely SR Latch PUF, Basic RO PUF, and Anderson PUF. We then perform a thorough statistical analysis on their performance. In addition, we propose the idea of the Hybrid PUF structure in which two (or more) …