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Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems
Low Power Multi-Channel Interface For Charge Based Tactile Sensors, Samuel Hansen
Low Power Multi-Channel Interface For Charge Based Tactile Sensors, Samuel Hansen
Department of Electrical and Computer Engineering: Dissertations, Theses, and Student Research
Analog front end electronics are designed in 65 nm CMOS technology to process charge pulses arriving from a tactile sensor array. This is accomplished through the use of charge sensitive amplifiers and discrete time filters with tunable clock signals located in each of the analog front ends. Sensors were emulated using Gaussian pulses during simulation. The digital side of the system uses SAR (successive approximation register) ADCs for sampling of the processed sensor signals.
Adviser: Sina Balkır
A Long-Channel Model For The Asymmetric Double-Gate Mosfet Valid In All Regions Of Operation, Abhishek Kammula, Bradley Minch
A Long-Channel Model For The Asymmetric Double-Gate Mosfet Valid In All Regions Of Operation, Abhishek Kammula, Bradley Minch
Bradley Minch
We present a physically based, continuous analytical model for long-channel double-gate MOSFETs. The model is particularly well suited for implementation in circuit simulators due to the simple expressions for the current andthe continuous nature of the derivatives of the current which improves convergence behavior.
Low Voltage And Performance Tunable Cmos Circuit Design Using Independently Driven Double Gate Mosfets, Arvind Kumar, Bradley Minch, Sandip Tiwari
Low Voltage And Performance Tunable Cmos Circuit Design Using Independently Driven Double Gate Mosfets, Arvind Kumar, Bradley Minch, Sandip Tiwari
Bradley Minch
Independently driven double-gate MOSFETs (DGFETs) facilitate design of analog circuits under digital logic constraints and provide in-circuit parameter adaptability through threshold voltage control. Threshold voltagetuning is achieved by biasing one of the two gates where as strong coupling of surface potentials at the two interfaces provides a low resistance feedback path. The geometry also allows a back-floating gate NVRAM structure with superior scalability and floating gate related analog applications without any read disturbance. This paper gives examples across breadth of circuits where this tunability is exploited.