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ASIC

American University in Cairo

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Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems

Fault Modeling And Test Vector Generation For Asic Devices Exposed To Space Single Event Environment, Ahmed Mohamed May 2021

Fault Modeling And Test Vector Generation For Asic Devices Exposed To Space Single Event Environment, Ahmed Mohamed

Theses and Dissertations

This work aims at providing a concise automated flow to predict the effect of Single Event Transients (SETs) on ASIC chips by developing a method to characterize the circuit susceptibility to SET pulses propagation and then generation of the required input vectors that sensitize the victim paths. A new enhanced method for SET electrical propagation modeling is proposed and compared to a previously published analytical model. The method was applied on different standard cells libraries built over XFAB Xh018 technology and verified for accuracy against simulations. The new method showed enhancement in accuracy compared with previous work in literature. Industrial …