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Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems

Investigating The Effect Of Detecting And Mitigating A Ring Oscillator-Based Hardware Trojan, Lakshmi Ramakrishnan Oct 2018

Investigating The Effect Of Detecting And Mitigating A Ring Oscillator-Based Hardware Trojan, Lakshmi Ramakrishnan

Electrical Engineering Theses and Dissertations

The outsourcing of the manufacturing process of integrated circuits to fabrications plants all over the world has exposed these chips to several security threats, especially at the hardware level. There have been instances of malicious circuitry, such as backdoors, being added to circuits without the knowledge of the chip designers or vendors. Such threats could be immensely powerful and dangerous against confidentiality, among other vulnerabilities.

Defense mechanisms against such attacks have been probed and defense techniques have been developed. But with the passage of time, attack techniques have improved immensely as well. From directly observing the inputs or outputs, adversaries …


High-Speed Single-Channel Sar Adc Using Coarse And Fine Comparators With Background Comparator Offset Calibration, Guanhua Wang May 2018

High-Speed Single-Channel Sar Adc Using Coarse And Fine Comparators With Background Comparator Offset Calibration, Guanhua Wang

Electrical Engineering Theses and Dissertations

A 1-GS/s 8-bit single-channel successive-approximation-register (SAR) analog-to-digital converter (ADC) using coarse and fine comparators with fully background comparator offset calibration is presented. Low-power coarse comparators and low-noise fine comparators are both employed to improve the comparator power efficiency. Non-binary digital-to-analog converter (DAC) with redundancy is employed to tolerate possible errors in the most-significant-bit (MSB) decisions. A novel comparator offset calibration scheme is proposed to remove the offsets between the different comparators, without slowing down the speed of the SAR conversion. The prototype ADC is simulated in a 28 nm CMOS technology and achieves an SNDR of 42.13 dB near Nyquist …