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VLSI and Circuits, Embedded and Hardware Systems Commons™
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Articles 1 - 5 of 5
Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems
Cmos Compatible Memristor Networks For Brain-Inspired Computing, Can Li
Cmos Compatible Memristor Networks For Brain-Inspired Computing, Can Li
Doctoral Dissertations
In the past decades, the computing capability has shown an exponential growth trend, which is observed as Moore’s law. However, this growth speed is slowing down in recent years mostly because the down-scaled size of transistors is approaching their physical limit. On the other hand, recent advances in software, especially in big data analysis and artificial intelligence, call for a break-through in computing hardware. The memristor, or the resistive switching device, is believed to be a potential building block of the future generation of integrated circuits. The underlying mechanism of this device is different from that of complementary metal-oxide-semiconductor (CMOS) …
On-Chip Communication And Security In Fpgas, Shivukumar Basanagouda Patil
On-Chip Communication And Security In Fpgas, Shivukumar Basanagouda Patil
Masters Theses
Innovations in Field Programmable Gate Array (FPGA) manufacturing processes and architectural design have led to the development of extremely large FPGAs. There has also been a widespread adaptation of these large FPGAs in cloud infrastructures and data centers to accelerate search and machine learning applications. Two important topics related to FPGAs are addressed in this work: on-chip communication and security. On-chip communication is quickly becoming a bottleneck in to- day’s large multi-million gate FPGAs. Hard Networks-on-Chip (NoC), made of fixed silicon, have been shown to provide low power, high speed, flexible on-chip communication. An iterative algorithm for routing pre-scheduled time-division-multiplexed …
Skybridge-3d-Cmos: A Fine-Grained Vertical 3d-Cmos Technology Paving New Direction For 3d Ic, Jiajun Shi
Skybridge-3d-Cmos: A Fine-Grained Vertical 3d-Cmos Technology Paving New Direction For 3d Ic, Jiajun Shi
Doctoral Dissertations
2D CMOS integrated circuit (IC) technology scaling faces severe challenges that result from device scaling limitations, interconnect bottleneck that dominates power and performance, etc. 3D ICs with die-die and layer-layer stacking using Through Silicon Vias (TSVs) and Monolithic Inter-layer Vias (MIVs) have been explored in recent years to generate circuits with considerable interconnect saving for continuing technology scaling. However, these 3D IC technologies still rely on conventional 2D CMOS’s device, circuit and interconnect mindset showing only incremental benefits while adding new challenges reliability issues, robustness of power delivery network design and short-channel effects as technology node scaling. Skybridge-3D-CMOS (S3DC) is …
Analog Signal Processing Solutions And Design Of Memristor-Cmos Analog Co-Processor For Acceleration Of High-Performance Computing Applications, Nihar Athreyas
Analog Signal Processing Solutions And Design Of Memristor-Cmos Analog Co-Processor For Acceleration Of High-Performance Computing Applications, Nihar Athreyas
Doctoral Dissertations
Emerging applications in the field of machine vision, deep learning and scientific simulation require high computational speed and are run on platforms that are size, weight and power constrained. With the transistor scaling coming to an end, existing digital hardware architectures will not be able to meet these ever-increasing demands. Analog computation with its rich set of primitives and inherent parallel architecture can be faster, more efficient and compact for some of these applications. The major contribution of this work is to show that analog processing can be a viable solution to this problem. This is demonstrated in the three …
Applications Of Physical Unclonable Functions On Asics And Fpgas, Mohammad Usmani
Applications Of Physical Unclonable Functions On Asics And Fpgas, Mohammad Usmani
Masters Theses
With the ever-increasing demand for security in embedded systems and wireless sensor networks, we require integrating security primitives for authentication in these devices. One such primitive is known as a Physically Unclonable Function. This entity can be used to provide security at a low cost, as the key or digital signature can be generated by dedicating a small part of the silicon die to these primitives which produces a fingerprint unique to each device. This fingerprint produced by a PUF is called its response. The response of PUFs depends upon the process variation that occurs during the manufacturing process. In …