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Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems
Accelerating Machine Learning Inference For Satellite Component Feature Extraction Using Fpgas., Andrew Ekblad
Accelerating Machine Learning Inference For Satellite Component Feature Extraction Using Fpgas., Andrew Ekblad
Theses and Dissertations
Running computer vision algorithms requires complex devices with lots of computing power, these types of devices are not well suited for space deployment. The harsh radiation environment and limited power budgets have hindered the ability of running advanced computer vision algorithms in space. This problem makes running an on-orbit servicing detection algorithm very difficult. This work proposes using a low powered FPGA to accelerate the computer vision algorithms that enable satellite component feature extraction. This work uses AMD/Xilinx’s Zynq SoC and DPU IP to run model inference. Experiments in this work centered around improving model post processing by creating implementations …
Side Channel Attack Counter Measure Using A Moving Target Architecture, Jithin Joseph
Side Channel Attack Counter Measure Using A Moving Target Architecture, Jithin Joseph
Electrical and Computer Engineering ETDs
A novel countermeasure to side-channel power analysis attacks called Side-channel Power analysis Resistance for Encryption Algorithms using DPR or SPREAD is investigated in this thesis. The countermeasure leverages a strategy that is best characterized as a moving target architecture. Modern field programmable gate arrays (FPGA) architectures provide support for dynamic partial reconfiguration (DPR), a feature that allows real-time reconfiguration of the programmable logic (PL). The moving target architecture proposed in this work leverages DPR to implement a power analysis countermeasure to side-channel attacks, the most common of which are referred to as differential power analysis (DPA) and correlation power analysis …
Time-Difference Circuits: Methodology, Design, And Digital Realization, Shuo Li
Time-Difference Circuits: Methodology, Design, And Digital Realization, Shuo Li
Doctoral Dissertations
This thesis presents innovations for a special class of circuits called Time Difference (TD) circuits. We introduce a signal processing methodology with TD signals that alters the target signal from a magnitude perspective to time interval between two time events and systematically organizes the primary TD functions abstracted from existing TD circuits and systems. The TD circuits draw attention from a broad range of application fields. In addition, highly evolved complementary metal-oxide-semiconductor (CMOS) technology suffers from various problems related to voltage and current amplitude signal processing methods. Compared to traditional analog and digital circuits, TD circuits bring several compelling features: …
An Fpga Based Implementation Of The Exact Stochastic Simulation Algorithm, Phani Bharadwaj Vanguri
An Fpga Based Implementation Of The Exact Stochastic Simulation Algorithm, Phani Bharadwaj Vanguri
Masters Theses
Mathematical and statistical modeling of biological systems is a desired goal for many years. Many biochemical models are often evaluated using a deterministic approach, which uses differential equations to describe the chemical interactions. However, such an approach is inaccurate for small species populations as it neglects the discrete representation of population values, presents the possibility of negative populations, and does not represent the stochastic nature of biochemical systems. The Stochastic Simulation Algorithm (SSA) developed by Gillespie is able to properly account for these inherent noise fluctuations. Due to the stochastic nature of the Monte Carlo simulations, large numbers of simulations …
Application Specific Customization And Scalability Of Soft Multiprocessors, Deepak C. Unnikrishnan
Application Specific Customization And Scalability Of Soft Multiprocessors, Deepak C. Unnikrishnan
Masters Theses 1911 - February 2014
Soft multiprocessor systems exploit the plentiful computational resources available in field programmable devices. By virtue of their adaptability and ability to support coarse grained parallelism, they serve as excellent platforms for rapid prototyping and design space exploration of embedded multiprocessor applications. As complex applications emerge, careful mapping, processor and interconnect customization are critical to the overall performance of the multiprocessor system. In this thesis, we have developed an automated scalable framework to efficiently map applications written in a high-level programmer-friendly language to customizable soft-cores. The framework allows the user to specify the application in a high-level language called Streamit. After …