Computer and Systems Architecture Commons^™

Location Of Processor Allocator And Job Scheduler And Its Impact On Cmp Performance, Dawid Zydek, Grzegorz Chmaj, Alaa Shawky, Henry Selvaraj

Electrical & Computer Engineering Faculty Research

High Performance Computing (HPC) architectures are being developed continually with an aim of achieving exascale capability by 2020. Processors that are being developed and used as nodes in HPC systems are Chip Multiprocessors (CMPs) with a number of cores. In this paper, we continue our effort towards a better processor allocation process. The Processor Allocator (PA) and Job Scheduler (JS) proposed and implemented in our previous works are explored in the context of its best location on the chip. We propose a system, where all locations on a chip can be analyzed, considering energy used by Network-on-Chip (NoC), PA and …

Extreme Learning Machine Terrain-Based Navigation For Unmanned Aerial Vehicles, Ee May Kan, Meng Hiot Lim, Yew Soon Ong, Ah-Hwee Tan, Swee Ping Yeo

Research Collection School Of Computing and Information Systems

Unmanned aerial vehicles (UAVs) rely on global positioning system (GPS) information to ascertain its position for navigation during mission execution. In the absence of GPS information, the capability of a UAV to carry out its intended mission is hindered. In this paper, we learn alternative means for UAVs to derive real-time positional reference information so as to ensure the continuity of the mission. We present extreme learning machine as a mechanism for learning the stored digital elevation information so as to aid UAVs to navigate through terrain without the need for GPS. The proposed algorithm accommodates the need of the …

Jumpstarting A Global Mobile Computing Lab At Pace University, Christelle Scharff

Cornerstone 2 Reports : Community Outreach and Empowerment Through Service Learning and Volunteerism

Mobile applications are the future of computing. This project focuses on jumpstarting a mobile lab at Pace University. It reaches out to the university community and beyond by integrating different events including a competition on mobile application development and hosting external speakers. A high school event and a panel discussion with experts in the field are planned.

A Simulation Analysis Of Photovoltaic Ac Module Integrated Converters In Parallel, Under Controlled Edge Shading Conditions, Lynette O'Callaghan, Mick Mckeever, Brian Norton

Conference Papers

A DC and AC power simulation comparison of: a Photovoltaic (PV) array with a modular, parallel, AC converter configuration; and a series, string configuration with a central AC converter, is presented. The systems are simulated using a comprehensive range of edge shading scenarios and irradiance conditions. Power control and transformation circuitry must be designed for shade and module mismatch tolerance to prevent over-proportional power to shade losses, as average losses from Building Integrated PV (BIPV) systems are approximately 20 to 25%, due to shade, mismatch, differences in orientation and inclination, and temperature effects. 59.4% of the simulations showed gains in …

The Value Of Modeling And Simulation Standards, Andrew J. Collins, David Meyr, Solomon Sherfey, Andreas Tolk, Mikel Petty

VMASC Publications

In the current economic climate, there is a requirement to justify all government spending by demonstrating the added-value that the expenditure gives. Modeling and Simulation (M&S) community is not exempted from this rule. This paper focuses on attempts to value standards and demonstrates that even though a myriad of different standards exist in the United States today, no one has "cracked the nut" on determining their value. This does not mean that standards are without value. The paper highlights their importance to our society and human development as a whole. Thus if we cannot give a value to M&S standards, …

Erasure Techniques In Mrd Codes, Florentin Smarandache, W.B. Vasantha Kandasamy, R. Sujatha, R.S. Raja Durai

Branch Mathematics and Statistics Faculty and Staff Publications

In this book the authors study the erasure techniques in concatenated Maximum Rank Distance (MRD) codes. The authors for the first time in this book introduce the new notion of concatenation of MRD codes with binary codes, where we take the outer code as the RD code and the binary code as the inner code. The concatenated code consists of the codewords of the outer code expressed in terms of the alphabets of the inner code. These new class of codes are defined as CRM codes. This concatenation techniques helps one to construct any CRM code of desired minimum distance …

Decision Strategies For A P2p Computing System, Grzegorz Chmaj, Krzysztof Walkowiak

Electrical & Computer Engineering Faculty Research

Peer-to-Peer (P2P) computing (also called ‘public-resource computing’) is an effective approach to perform computation of large tasks. Currently used P2P computing systems (e.g., BOINC) are most often centrally managed, i.e., the final result of computations is created at a central node using partial results – what may be not efficient in the case when numerous participants are willing to download the final result. In this paper, we propose a novel approach to P2P computing systems. We assume that results can be delivered to all peers in a distributed way using three types of network flows: unicast, Peer-to-Peer and anycast. We …

Simultaneous Camera Pose And Correspondence Estimation With Motion Coherence, Wen-Yan Lin, Loong-Fah Cheong, Ping Tan, Guo Dong, Siying Liu

Research Collection School Of Computing and Information Systems

Traditionally, the camera pose recovery problem has been formulated as one of estimating the optimal camera pose given a set of point correspondences. This critically depends on the accuracy of the point correspondences and would have problems in dealing with ambiguous features such as edge contours and high visual clutter. Joint estimation of camera pose and correspondence attempts to improve performance by explicitly acknowledging the chicken and egg nature of the pose and correspondence problem. However, such joint approaches for the two-view problem are still few and even then, they face problems when scenes contain largely edge cues with few …

Evaluating Speedup In Parallel Compilers, Deepa V. Komathukattil

UNF Graduate Theses and Dissertations

Parallel programming is prevalent in every field mainly to speed up computation. Advancements in multiprocessor technology fuel this trend toward parallel programming. However, modern compilers are still largely single threaded and do not take advantage of the machine resources available to them. There has been a lot of work done on compilers that add parallel constructs to the programs they are compiling, enabling programs to exploit parallelism at run time. Auto parallelization of loops by a compiler is one such example. Researchers have done very little work towards parallelizing the compilation process itself.

The research done here focuses on parallel …