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Computer and Systems Architecture Commons™
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- Computer architecture (3)
- Hewlett-Packard computers (3)
- RISC microprocessors (3)
- Computer architecture -- Design (2)
- Information Retrieval (2)
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- Operating systems (Computers) (2)
- Operating systems (Computers) -- Evaluation (2)
- Virtual storage (Computer science) -- Design and construction (2)
- Ada (Computer program language) (1)
- Artificial intelligence (1)
- Computer architecture -- Evaluation (1)
- Computer input-output equipment -- Enhancement (1)
- Computer software -- Testing (1)
- Debugging in computer science (1)
- Discourse and human communication (1)
- Discourse and human interaction (1)
- Discourse level structure. (1)
- Functional programming (Computer science) (1)
- Genetic algorithms (1)
- Hyper cube networks (1)
- Information retrieval and discourse (1)
- Knowledge-based systems (1)
- On-line scheduling (1)
- Operating systems (Computers) -- Design and construction (1)
- Operating systems (Computers) -- Programming (1)
- Real-time (1)
- SMIMD (1)
- Situational information retrieval (1)
- Software architecture (1)
- Software engineering (1)
- Publication
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Articles 1 - 12 of 12
Full-Text Articles in Computer and Systems Architecture
Creating And Manipulating Formalized Software Architectures To Support A Domain-Oriented Application Composition System, Cynthia G. Anderson
Creating And Manipulating Formalized Software Architectures To Support A Domain-Oriented Application Composition System, Cynthia G. Anderson
Theses and Dissertations
This research investigated technology which enables sophisticated users to specify, generate, and maintain application software in domain-oriented terms. To realize this new technology, a development environment, called Architect, was designed and implemented. Using canonical formal specifications of domain objects, Architect rapidly composes these specifications into a software application and executes a prototype of that application as a means to demonstrate its correctness before any programming language specific code is generated. Architect depends upon the existence of a formal object base (or domain model) which was investigated by another student in related research. The research described in this thesis relied on …
An Intelligent Real-Time System Architecture Implemented In Ada, Michael A. Whelan
An Intelligent Real-Time System Architecture Implemented In Ada, Michael A. Whelan
Theses and Dissertations
Conventional real-time systems are fully deterministic allowing for off-line, optimal, task scheduling under all circumstances. Real-time intelligent systems add non-deterministic task execution times and non- deterministic task sets for scheduling purposes. Non-deterministic task sets force intelligent real-time systems to trade-off execution time with solution quality during run-time and perform dynamic task scheduling. Four basic design considerations addressing those tradeoffs have been identified: control reasoning, focus of attention, parallelism, and algorithm efficacy. Non-real- time intelligent systems contain an environment sensor, a model of the environment, a reasoning process, and a large collection of procedural processes. Real-time intelligent systems add to these …
Generalization And Parallelization Of Messy Genetic Algorithms And Communication In Parallel Genetic Algorithms, Laurence D. Merkle
Generalization And Parallelization Of Messy Genetic Algorithms And Communication In Parallel Genetic Algorithms, Laurence D. Merkle
Theses and Dissertations
Genetic algorithms (GA) are highly parallelizable, robust semi- optimization algorithms of polynomial complexity. The most commonly implemented GAs are 'simple' GAs (SGAs). Reproduction, crossover, and mutation operate on solution populations. Deceptive and GA-hard problems are provably difficult for simple GAs. Messy GAs (MGA) are designed to overcome these limitations. The MGA is generalized to solve permutation type optimization problems. Its performance is compared to another MGA's, an SGA's, and a permutation SGA's. Against a fully deceptive problem the generalized MGA (GMGA) consistently performs better than the simple GA. Against an NP-complete permutation problem, the GMGA performs better than the other …
Discourse-Level Analysis Of Abstracts For Information Retrieval: A Probabilistic Approach, Robert N. Oddy
Discourse-Level Analysis Of Abstracts For Information Retrieval: A Probabilistic Approach, Robert N. Oddy
School of Information Studies - Faculty Scholarship
The objective of this research is to contribute to our knowledge of how people seek information, and how computer systems can be designed to help in this process. Most information retrieval research since the field emerged in the 1950's has reduced these questions to that of trying to determine how documents relevant to a user's query might be selected from a large collection of texts---a question that has proved remarkably difficult to answer. The present work takes the stance that this particular reduction increasingly limits progress towards the objective stated above. It is directed instead towards the development of a …
Towards The Use Of Situational Information In Information Retrieval, Robert N. Oddy, Elizabeth D. Liddy, Ann Bishop, Eileen Martin, Joseph Elewononi, Bhaskaran Balakrishnan
Towards The Use Of Situational Information In Information Retrieval, Robert N. Oddy, Elizabeth D. Liddy, Ann Bishop, Eileen Martin, Joseph Elewononi, Bhaskaran Balakrishnan
School of Information Studies - Faculty Scholarship
This paper is an exploratory study of one approach to incorporating situational information into information retrieval systems, drawing on principles and methods of discourse linguistics. A tenet of discourse linguistics is that texts of a specific type possess a structure above the syntactic level, which follows conventions known to the people using such texts to communicate. In some cases, such as literature describing work done, the structure is closely related to situations, and may therefore be a useful representational vehicle for the present purpose. Abstracts of empirical research papers exhibit a well-defined discourse- level structure, which is revealed by lexical …
Porting Chorus To The Pa-Risc: Overall Evaluation, Jonathan Walpole, Marion Hakanson, Jon Inouye, Ravi Konuru
Porting Chorus To The Pa-Risc: Overall Evaluation, Jonathan Walpole, Marion Hakanson, Jon Inouye, Ravi Konuru
Computer Science Faculty Publications and Presentations
This document is part of a series of reports describing the design decisions made in porting the Chorus Operating System kernel to the Hewlett-Packard 9000 Series 800 workstation. This document summarizes the matches and mis-matches between Chorus and the PA-RISC and outlines the general lessons learned during the project.
This document is intended for people who are interested in (a) the separation of machinedependent micro-kernel code from machine-independent micro-kernel code, (b) the interaction between operating system design and the PA-RISC architecture, and (c) the portability ofthe Chorus operating system.
The first report in the series, Porting Chorus to the PA-RISe: …
Porting Chorus To The Pa-Risc: Booting, Jon Inouye, Ravi Konuru, Jonathan Walpole, Marion Hakanson
Porting Chorus To The Pa-Risc: Booting, Jon Inouye, Ravi Konuru, Jonathan Walpole, Marion Hakanson
Computer Science Faculty Publications and Presentations
We started out with the low level Tut (HP-CX 2.0) boot code. One of our goals was to reuse as much of this code as possible, which would reduce the amount of low level code we would have to debug. This was very important, especially fiince the RP 9000/834 has a very complex I/O architecture and we lacked any sophisticated debugging tools. Writing the PA-Chorus boot code involved modifying the Tut code to match the Chorus startup sequence. In the remainder of this section, we present an overview of the PA-RISC boot mechanisms and the Chorus startup sequence. Sectlon 2 …
Porting Chorus To The Pa-Risc: Virtual Memory Manager, Jon Inouye, Marion Hakanson, Ravi Konuru, Jonathan Walpole
Porting Chorus To The Pa-Risc: Virtual Memory Manager, Jon Inouye, Marion Hakanson, Ravi Konuru, Jonathan Walpole
Computer Science Faculty Publications and Presentations
This document describes the port ofthe Chorus virtual memory manager to the Hewlett-Packard Precision Architecture rusc (PA-RISC) workstation. The information contained in this paper will be of interest to people who:
• intend to port the Chorus virtual memory section. • intend to port a virtual memory design to the Hewlett-Packard PA-RISC.
The reader is strongly encouraged to read the following PA-Chorus documents before reading this document:
• Technical Report CSE-92-3, Porting Chorus to the PA-RISC: Project Overview
Porting Chorus To The Pa-Risc: Project Overview, Jonathan Walpole, Marion Hakanson, Jon Inouye, Ravi Konuru
Porting Chorus To The Pa-Risc: Project Overview, Jonathan Walpole, Marion Hakanson, Jon Inouye, Ravi Konuru
Computer Science Faculty Publications and Presentations
This document is part of a series of reports describing the design decisions made in porting the Chorus Operating System to the Hewlett-Packard 9000 Series 800 workstation. This document presents an overview of the project, and outlines the other reports in the series and the relationships between them.
Porting Chorus To The Pa-Risc: Building, Debugging, Testing And Validation, Ravi Konuru, Marion Hakanson, Jon Inouye, Jonathan Walpole
Porting Chorus To The Pa-Risc: Building, Debugging, Testing And Validation, Ravi Konuru, Marion Hakanson, Jon Inouye, Jonathan Walpole
Computer Science Faculty Publications and Presentations
This document is part of a series of reports describing the design decisions made in porting the Chorus Operating System to the Hewlett-Packard 9000 Series 800 workstation. This document describes the environment for building the Chorus kernel, the various kernel tests, and the debugging environment used for porting the Chorus operating system to the HP PA-RISC.
The information contained in this paper will be of interest to people who wish to:
• Use the PA-Chorus kernel for development and/or modification, • Know about the build environment for Chorus kernel on PA-RISC, • Know about the PA-Chorus approach to debugging, • …
Porting The Chorus Supervisor And Related Low-Level Functions To The Pa-Risc, Ravi Konuru, Marion Hakanson, Jon Inouye, Jonathan Walpole
Porting The Chorus Supervisor And Related Low-Level Functions To The Pa-Risc, Ravi Konuru, Marion Hakanson, Jon Inouye, Jonathan Walpole
Computer Science Faculty Publications and Presentations
This document is part of a series of reports describing the design decisions made in porting the Chorus Operating System to the Hewlett-Packard 9000 Series 800 workstation.
The Supervisor is the name given by Chorus to a collection of low-level functions that are machine dependent and have to be implemented when Chorus is ported from one machine to another. The Supervisor is responsible for interrupt, trap and exception handling, managing low-level thread initialization, context switch, kernel initialization, managing simple devices (timer and console) and offering a low-level debugger. This document describes the port of the Supervisor and related low-level functions. …
Smimd - A Synchronous Multiple Instruction Multiple Data Computer Architecture, Cathy C. Roberts
Smimd - A Synchronous Multiple Instruction Multiple Data Computer Architecture, Cathy C. Roberts
Computer Science Theses & Dissertations
This thesis assesses the feasibility of utilizing a hypercube interconnect topology to link a heterogeneous processor array in a very long instruction word (VLIW) computer architecture. The research focused upon the selection of a suitable arrangement of processors for the computer and the subsequent demonstration of the architecture's capability to handle simple loop iterations. Previous attempts at VLIW computer design are summarized, the new SMIMD architecture is presented, and suggestions for future research are given. The thesis concludes with results of the initial performance evaluations of the architecture design.