Computer and Systems Architecture Commons^™

Non-Volatile Memory Adaptation In Asynchronous Microcontroller For Low Leakage Power And Fast Turn-On Time, Jean Pierre Thierry Habimana

Graduate Theses and Dissertations

This dissertation presents an MSP430 microcontroller implementation using Multi-Threshold NULL Convention Logic (MTNCL) methodology combined with an asynchronous non-volatile magnetic random-access-memory (RAM) to achieve low leakage power and fast turn-on. This asynchronous non-volatile RAM is designed with a Spin-Transfer Torque (STT) memory device model and CMOS transistors in a 65 nm technology. A self-timed Quasi-Delay-Insensitive 1 KB STT RAM is designed with an MTNCL interface and handshaking protocol. A replica methodology is implemented to handle write operation completion detection for long state-switching delays of the STT memory device. The MTNCL MSP430 core is integrated with the STT RAM to create …

Lecture 00: Opening Remarks: 46th Spring Lecture Series, Tulin Kaman

Mathematical Sciences Spring Lecture Series

Opening remarks for the 46th Annual Mathematical Sciences Spring Lecture Series at the University of Arkansas, Fayetteville.

Ppmexplorer: Using Information Retrieval, Computer Vision And Transfer Learning Methods To Index And Explore Images Of Pompeii, Cindy Roullet

Graduate Theses and Dissertations

In this dissertation, we present and analyze the technology used in the making of PPMExplorer: Search, Find, and Explore Pompeii. PPMExplorer is a software tool made with data extracted from the Pompei: Pitture e Mosaic (PPM) volumes. PPM is a valuable set of volumes containing 20,000 historical annotated images of the archaeological site of Pompeii, Italy accompanied by extensive captions. We transformed the volumes from paper, to digital, to searchable. PPMExplorer enables archaeologist researchers to conduct and check hypotheses on historical findings. We present a theory that such a concept is possible by leveraging computer generated correlations between artifacts using …

Stay-At-Home Motor Rehabilitation: Optimizing Spatiotemporal Learning On Low-Cost Capacitive Sensor Arrays, Reid Sutherland

Graduate Theses and Dissertations

Repeated, consistent, and precise gesture performance is a key part of recovery for stroke and other motor-impaired patients. Close professional supervision to these exercises is also essential to ensure proper neuromotor repair, which consumes a large amount of medical resources. Gesture recognition systems are emerging as stay-at-home solutions to this problem, but the best solutions are expensive, and the inexpensive solutions are not universal enough to tackle patient-to-patient variability. While many methods have been studied and implemented, the gesture recognition system designer does not have a strategy to effectively predict the right method to fit the needs of a patient. …

A Simulation Tool For Evaluating The Environmental Impacts Of Management Scenarios For Modern Broiler Production Systems, Martin Andrew Christie

Graduate Theses and Dissertations

The purpose of this work is to provide a simulation tool that allows broiler production practitioners and researchers to simulate the effects of farm design and management practices on resource consumption and environmental impacts. This tool allows the user to design unique farms and simulates on farm processes required to raise broiler chicks to a marketable age. The use can input data such as farm location, broiler breed, flock size, ration type, barn dimensions, and climate control equipment specifications. The algorithms used to simulate broiler breed specific feed intake, broiler weight gain, and other on farm processes such as heating, …

Identifying Fake News Using Emotion Analysis, Brady Gilleran

Computer Science and Computer Engineering Undergraduate Honors Theses

This paper presents research applying Emotional Analysis to “Fake News” and “Real News” articles to investigate whether or not there is a difference in the emotion used in these two types of news articles. The paper reports on a dataset for Fake and Real News that we created, and the natural language processing techniques employed to process the collected text. We use a lexicon that includes predefined words for eight emotions (anger, anticipation, disgust, fear, surprise, sadness, joy, trust) to measure the emotional impact in each of these eight dimensions. The results of the emotion analysis are used as features …

Towards A Prototype Platform For Ros Integrations On A Ground Robot, Taylor Joseph Linville Whitaker

Graduate Theses and Dissertations

The intent of this work was to develop, evaluate, and demonstrate a prototype robot platform on which ROS integrations could be explored. With observations of features and requirements of existing industrial and service mobile ground robots, a platform was designed and outfitted with appropriate components to enable the most common operational-critical functionalities and account for unforeseen components and features. The resulting Arlo Demonstration Robot accommodates basic mapping, localization, and navigation in both two and three-dimensional space as well as additional safety and teleoperation features. The control system is centered around the Zybo Z7 FPGA SoC hosting a custom hardware design. …

Automatic Performance Optimization On Heterogeneous Computer Systems Using Manycore Coprocessors, Chenggang Lai

Graduate Theses and Dissertations

Emerging computer architectures and advanced computing technologies, such as Intel’s Many Integrated Core (MIC) Architecture and graphics processing units (GPU), provide a promising solution to employ parallelism for achieving high performance, scalability and low power consumption. As a result, accelerators have become a crucial part in developing supercomputers. Accelerators usually equip with different types of cores and memory. It will compel application developers to reach challenging performance goals. The added complexity has led to the development of task-based runtime systems, which allow complex computations to be expressed as task graphs, and rely on scheduling algorithms to perform load balancing between …

Smart Surge Irrigation Using Microcontroller Based Embedded Systems And Internet Of Things, Prashant Dinkar Borhade

Graduate Theses and Dissertations

Surge Irrigation is a type of furrow irrigation and one of many efficient irrigation techniques. It is one of the economical techniques and requires minimum labor for monitoring it. In surge irrigation, water is applied intermittently to a field to achieve uniform distribution of water along the furrows, which is important while irrigating, as it ensures that there is enough water near the root zone of the crop. The uneven distribution can cause a loss in crop productivity.

Surge irrigation uses a surge valve, which is an electro-mechanical device that irrigates a field. The commercial surge valves available on the …

A Proposed Approach To Hybrid Software-Hardware Application Design For Enhanced Application Performance, Alex Shipman

Graduate Theses and Dissertations

One important aspect of many commercial computer systems is their performance; therefore, system designers seek to improve the performance next-generation systems with respect to previous generations. This could mean improved computational performance, reduced power consumption leading to better battery life in mobile devices, smaller form factors, or improvements in many areas. In terms of increased system speed and computation performance, processor manufacturers have been able to increase the clock frequency of processors up to a point, but now it is more common to seek performance gains through increased parallelism (such as a processor having more processor cores on a single …

Energy And Performance Balancing Architecture For Asynchronous Data Processing Platforms, Chien-Wei Lo

Graduate Theses and Dissertations

The semiconductor industry has been increasingly focused on the energy consumption and heat generation in CMOS-based integrated circuits (ICs) for its dominating impact on the system performance and reliability. Without clock-related timing constraints, asynchronous circuits have demonstrated unique flexibility in performance-energy tradeoffs compared to synchronous designs. This dissertation work presents the architecture capable of balancing energy and performance for asynchronous digital signal processing circuits using the Multi-Threshold NULL Convention Logic (MTNCL). Architecture implementing user-configurable adaptive dynamic voltage scaling (DVS) and data processing core disabling based on the detection and parameterization of system throughput are developed for MTNCL parallel homogeneous and …

Power Efficient High Temperature Asynchronous Microcontroller Design, Nathan William Kuhns

Graduate Theses and Dissertations

There is an increasing demand for dependable and efficient digital circuitry capable of operating in high temperature environments. Extreme temperatures have adverse effects on traditional silicon synchronous systems because of the changes in delay and setup and hold times caused by the variances in each device’s threshold voltage. This dissertation focuses on the design of the major functionality of an asynchronous 8051 microcontroller in Raytheon’s high temperature Silicon Carbide process, rated for operation over 300ºC. The microcontroller is designed in NULL Convention Logic, for which the traditional bus architecture used for data transfer would consume a large amount of power. …

Just In Time Assembly (Jita) - A Run Time Interpretation Approach For Achieving Productivity Of Creating Custom Accelerators In Fpgas, Sen Ma

Graduate Theses and Dissertations

The reconfigurable computing community has yet to be successful in allowing programmers to access FPGAs through traditional software development flows. Existing barriers that prevent programmers from using FPGAs include: 1) knowledge of hardware programming models, 2) the need to work within the vendor specific CAD tools and hardware synthesis. This thesis presents a series of published papers that explore different aspects of a new approach being developed to remove the barriers and enable programmers to compile accelerators on next generation reconfigurable manycore architectures. The approach is entitled Just In Time Assembly (JITA) of hardware accelerators. The approach has been defined …

Data Integrity Verification In Cloud Computing, Katanosh Morovat

Graduate Theses and Dissertations

Cloud computing is an architecture model which provides computing and storage capacity as a service over the internet. Cloud computing should provide secure services for users and owners of data as well. Cloud computing services are a completely internet-based technology where data are stored and maintained in the data center of a cloud provider. Lack of appropriate control over the data might incur several security issues. As a result, some data stored in the cloud must be protected at all times. These types of data are called sensitive data. Sensitive data is defined as data that must be protected against …

A Deep Search Architecture For Capturing Product Ontologies, Tejeshwar Sangameswaran

Graduate Theses and Dissertations

This thesis describes a method to populate very large product ontologies quickly. We discuss a deep search architecture to text-mine online e-commerce market places and build a taxonomy of products and their corresponding descriptions and parent categories. The goal is to automatically construct an open database of products, which are aggregated from different online retailers. The database contains extensive metadata on each object, which can be queried and analyzed. Such a public database currently does not exist; instead the information currently resides siloed within various organizations. In this thesis, we describe the tools, data structures and software architectures that allowed …

Study Of Parallel Programming Models On Computer Clusters With Accelerators, Chenggang Lai

Graduate Theses and Dissertations

In order to reach exascale computing capability, accelerators have become a crucial part in developing supercomputers. This work examines the potential of two latest acceleration technologies, Intel Many Integrated Core (MIC) Architecture and Graphics Processing Units (GPUs). This thesis applies three benchmarks under 3 different configurations, MPI+CPU, MPI+GPU, and MPI+MIC. The benchmarks include intensely communicating application, loosely communicating application, and embarrassingly parallel application. This thesis also carries out a detailed study on the scalability and performance of MIC processors under two programming models, i.e., offload model and native model, on the Beacon computer cluster.

According to different benchmarks, the results …

Software Porting Of A 3d Reconstruction Algorithm To Razorcam Embedded System On Chip, Kevin Curtis Gunn

Graduate Theses and Dissertations

A method is presented to calculate depth information for a UAV navigation system from Keypoints in two consecutive image frames using a monocular camera sensor as input and the OpenCV library. This method was first implemented in software and run on a general-purpose Intel CPU, then ported to the RazorCam Embedded Smart-Camera System and run on an ARM CPU onboard the Xilinx Zynq-7000. The results of performance and accuracy testing of the software implementation are then shown and analyzed, demonstrating a successful port of the software to the RazorCam embedded system on chip that could potentially be used onboard a …

Designing Customizable Network-On-Chip With Support For Embedded Private Memory For Multi-Processor System-On-Chips, Azad Fakhari

Graduate Theses and Dissertations

The computer industry's transition to multiprocessor systems on chip (MPSoC) architectures is increasing the need for new scalable high-bandwidth on-chip communication

backbones. Network-on-Chip (NoC) interconnects are gaining interest for serving as the on-chip communication infrastructure. The most important issues to be considered in designing a NoC are topology, routing algorithm, flow control, and buffering and also the trade-offs between performance, power, and area.

This research proposes a custom-designed NoC specifically for MPSoCs on FPGAs. The proposed design allows the communication infrastructure to seamlessly scale as the numbers of processors within the chip increases. The design adds a new level of …

Parallelizing Scale Invariant Feature Transform On A Distributed Memory Cluster, Stanislav Bobovych

Inquiry: The University of Arkansas Undergraduate Research Journal

Scale Invariant Feature Transform (SIFT) is a computer vision algorithm that is widely-used to extract features from images. We explored accelerating an existing implementation of this algorithm with message passing in order to analyze large data sets. We successfully tested two approaches to data decomposition in order to parallelize SIFT on a distributed memory cluster.

A Comparative Evaluation Of .Net Remoting And Java Rmi, Taneem Ibrahim

Inquiry: The University of Arkansas Undergraduate Research Journal

Distributed application technologies such as Micrososoft.NET Remoting, and Java Remote Method Invocation (RMI) have evolved over many years to keep up with the constantly increasing requirements of the enterprise. In the broadest sense, a distributed application is one in which the application processing is divided among two or more machines. Distributed middleware technologies have made significant progress over the last decade. Although Remoting and RMI are the two of most popular contemporary middleware technologies, little literature exists that compares them. In this paper, we study the issues involved in designing a distributed system using Java RMI and Microsoft.NET Remoting. In …

Computer Model For Predicting Aids Among Intravenous Drug Users, Daniel Berleant, R. Ron Goforth, Jun Yuan

Journal of the Arkansas Academy of Science

Intravenous drug abuse (IVDA) is an important cause of HIV transmission. Computer simulation is one way to understand and predict the spread of HIV infection among IVDAs. We design and simulate HIV infection among IVDAs and the impact of AIDS on this community, and thereby predict future IVDA population, HIV levels, AIDS levels, and AIDS deaths in this group. The HIV to AIDS, and AIDS to Death latencies are described by probability density functions (PDFs) in this model. Factors such as the recruit, quit, and normal death rate of IVDAs, are considered, as well as the infection and removal rates …

Construction And Software Design For A Microcomputer Controlled Ph/Ion Titrator, Edmond W. Wilson Jr., Dennis K. Thompson, James E. Mackey

Journal of the Arkansas Academy of Science

The construction of an automated titration device is described. The major components include an Apple II+ Microcomputer and 8-bit parallel interface. Fisher Accumet, Model 520 Digital pH/lon Meter, Gilmont Micrometer Buret of 2.5 mL capacity, Sigma stepper motor, power supply and driver to operate the buret, and a constant temperature bath of ± 0.005 °C stability. The limitations of the system are 0.001 pH/0.1 mv for the pH/ion sensing system, and 0.125 μL per step for the buret. The system as described is designed to determine equilibrium constants for metal ion-amino acid complexes. By changing the software a variety of …