Computer and Systems Architecture Commons^™

Model Scheme A Good Fit For C4isr, Andreas Tolk

Computational Modeling & Simulation Engineering Faculty Publications

No abstract provided.

Compute As Fast As The Engineers Can Think! Utrafast Computing Team Final Report, Robert T. Biedron, P. Mehrotra, Michael L. Nelson, M. L. Preston, J. J. Rehder, J. L. Rogersm, D. H. Rudy, J. Sobieski, O. O. Storaasli

Computer Science Faculty Publications

This report documents findings and recommendations by the Ultrafast Computing Team (UCT). In the period 10-12/98, UCT reviewed design case scenarios for a supersonic transport and a reusable launch vehicle to derive computing requirements necessary for support of a design process with efficiency so radically improved that human thought rather than the computer paces the process. Assessment of the present computing capability against the above requirements indicated a need for further improvement in computing speed by several orders of magnitude to reduce time to solution from tens of hours to seconds in major applications. Evaluation of the trends in computer …

Architectural Optimization Of Digital Libraries, Aileen O. Biser

Computer Science Theses & Dissertations

This work investigates performance and scaling issues relevant to large scale distributed digital libraries. Presently, performance and scaling studies focus on specific implementations of production or prototype digital libraries. Although useful information is gained to aid these designers and other researchers with insights to performance and scaling issues, the broader issues relevant to very large scale distributed libraries are not addressed. Specifically, no current studies look at the extreme or worst case possibilities in digital library implementations. A survey of digital library research issues is presented. Scaling and performance issues are mentioned frequently in the digital library literature but are …

Scheduling Processors For Distributed, Critical, Real-Time Systems, Hari K. Narasimhamurthy

Electrical & Computer Engineering Theses & Dissertations

The development of a procedure to obtain cyclo-static schedules for distributed, critical real-time applications is presented in this thesis. The applications considered in this thesis are characterized by hard deadlines and periodic inputs. The applica­ tions are described by a data flow graph model which guarantees performance. Given the data flow graph representation, processors are scheduled to complete tasks as specified in the representation. The scheduling technique separates the scheduling of tasks in time and the assignment of processors to tasks. While different criteria exist for task scheduling, a schedule which minimizes latency and maximizes throughput is used in this …

Fault Tolerance In Critical Real-Time Systems, Balaji Tirukarneswaran

Electrical & Computer Engineering Theses & Dissertations

Critical real-time applications require work to be completed before a predefined deadline, else the consequences may be catastrophic. The anticipation of faults in such systems necessitates the need for fault tolerance. Fault tolerance can be achieved in many different ways. A real-time system designer may impose restrictions on any of the system performance measures such as the latency, throughput and number of processors, depending on the type of application. In this work, several different fault tolerant strategies for any given DFG (Data Flow Graph) are discussed. DFG models are developed using the strategies and the resulting worst case performances a.re …

Real-Time Communication In The Algorithm To Architecture Mapping Model, Somesh M. Varma

Electrical & Computer Engineering Theses & Dissertations

The objective of this thesis is to analyze schedules of communication resources to obtain deterministic and contention-free communication in the Algorithm To Architecture Mapping Model (ATAMM). In ATAMM, performance must be deterministic to guarantee meeting deadlines. It is difficult to achieve deterministic performance in the presence of contention during communication. This thesis develops new data-flow models to study and analyze different schedules of communication resources to achieve deterministic and contention-free communication. These models are the Synchronous Communication Marked Graph (SCMG) and the Asynchronous Communication Marked Graph (ACMG). The SCMG is based on message passing synchronous communication. It defines schedules for …

Defining Locally Shared Memory Constructs For Special Purpose Parallel Architectures, David J. Nielsen

Electrical & Computer Engineering Theses & Dissertations

Locally shared memory systems offer significant advantages over other parallel processing systems for specific classes of problems. Locally shared memory systems tend to be easier to program because explicit passing of messages is not necessary. The goal in defining a locally shared memory system is to allow only a small number of processors access to any single memory. If this goal is met, locally shared memory systems provide an architecture which is relatively simple to implement.

To make shared memory architectures attractive to designers of special purpose parallel architectures, the architectures must be scalable. To be scalable, the number of …

Acoustic Correlates Of Vowel Perception As Determined From Synthesis Experiments With Multi-Tone Stimuli, Zhongjiang Zhang

Electrical & Computer Engineering Theses & Dissertations

An essential requirement of speech signal processing is to extract information (features or parameters) from the speech signal which encode the information carried by the signal. The objective of this thesis work was to examine and evaluate two feature sets as acoustic correlates for vowel perception. They are formants and DCTCs. Formants are the frequencies of spectral peaks of the speech signal. DCTCs are the Discrete Cosine Transform Coefficients of the magnitude spectrum and are thus features which encode the global spectral shape of speech signal.

There are different opinions regarding which feature set is a more accurate representation for …

Smimd - A Synchronous Multiple Instruction Multiple Data Computer Architecture, Cathy C. Roberts

Computer Science Theses & Dissertations

This thesis assesses the feasibility of utilizing a hypercube interconnect topology to link a heterogeneous processor array in a very long instruction word (VLIW) computer architecture. The research focused upon the selection of a suitable arrangement of processors for the computer and the subsequent demonstration of the architecture's capability to handle simple loop iterations. Previous attempts at VLIW computer design are summarized, the new SMIMD architecture is presented, and suggestions for future research are given. The thesis concludes with results of the initial performance evaluations of the architecture design.

Simulator For Concurrent Processing Data Flow Architectures, Mahyar R. Malekpour

Electrical & Computer Engineering Theses & Dissertations

A software simulator capable of simulating execution of an algorithm graph on a given system under the Algorithm To Architecture Mapping Model (ATAMM) rules is presented in this thesis. ATAMM is capable of modeling the execution of large-grained algorithms on distributed data flow architectures. Investigating the behavior and determining the performance of an ATAMM based system requires the aid of software tools. The ATAMM Simulator presented in this thesis is capable of determining the behavior, performance, and reliability of a system without having to build a hardware prototype. Case studies are performed on four algorithms to demonstrate the capabilities of …

A Software Design Tool For Predictable Performance In Real-Time, Data Flow Architectures, Brij Mohan V. Mandala

Electrical & Computer Engineering Theses & Dissertations

A software design tool which aids in the performance evaluation and selection of operating points for an algorithm implemented in ATAMM defined data flow architectures is presented in this thesis. ATAMM (Algorithm To Architecture Mapping Model) is a new graph theoretic model developed by researchers at Old Dominion University and the NASA-Langley Research Center. ATAMM is capable of modeling the execution of large-grained algorithms on distributed data flow architectures. A software tool is required for predicting the performance, determining the resource requirements and for selecting suitable operating points for an ATAMM based system. The ATAMM Design Tool presented in this …

Diagnostics Software For Concurrent Processing Computer Systems, Robert L. Jones Iii

Electrical & Computer Engineering Theses & Dissertations

Diagnostics software for analyzing ATAMM based concurrent processing systems is presented in this thesis. ATAMM (Algorithm to Architecture Mapping Model) is a new model developed by researchers at Old Dominion University and the NASA-Langley Research Center. ATAMM is capable of modeling the execution of large grain algorithms on distributed data flow architectures. Investigating a real or simulated ATAMM based system requires the aid of software tools. The software tool presented in this thesis can evaluate the behavior and performance of an ATAMM based system. The tool graphically portrays algorithm activities and processor activities. The tool's measurement capabilities indicate computing speed, …

Pipelining Data Compression Algorithms, R. L. Bailey, R. Mukkamala

Computer Science Faculty Publications

Many different data compression techniques currently exist. Each has its own advantages and disadvantages. Combining (pipelining) multiple data compression techniques could achieve better compression rates than is possible with either technique individually. This paper proposes a pipelining technique and investigates the characteristics of two example pipelining algorithms. Their performance is compared with other well-known compression techniques.

Atamm Multicomputer System Design, William Robert Tymchyshyn

Electrical & Computer Engineering Theses & Dissertations

The Algorithm To Architecture Mapping Model, or ATAMM, is a graph theoretic design methodology that has been created to resolve design and performance issues involved with concurrent processing. Petri-net marked graphs are used to represent the computational environment.

This thesis describes the development of a multicomputer system which will operate within the bounds specified by the ATAMM model. The system is first designed and implemented using the framework of standard multicomputer design theory. A validation is then performed by the comparison of the system's computational performance to results predicted by ATAMM. This validation is shown to be successful for three …

A Simulation Study Of A Space-Borne Optical Disk Mass Memory System, Kenny G. Chen

Electrical & Computer Engineering Theses & Dissertations

Issues concerning space-borne applications of an optical disk mass memory system (ODMMS) are investigated through computer simulation. The simulation model is developed according to a current description of the ODMMS with certain application constraints. The results are examined in terms of system modularity, multi-user data rate buffering, disk module access, and read/write file management. The conditions and requirements for future disk controller designs are indicated in the simulation results.

Software Tools For Performance Evaluation Of Concurrent Processing, Rodrogo A. Obando

Electrical & Computer Engineering Theses & Dissertations

The development and use of software tools for performance evaluation of concurrent processing is presented in this thesis. The particular concurrent processing architecture proposed by Stoughton and Mielke is investigated. The modelling of this architecture is based on Petri net theory and it can be studied making use of circuit theory. Computation of lower bounds for Time Between Outputs (TBO) and Time Between Input and Output (TBIO) can be accomplished by using principles of circuit theory, among others. This new modelling needs to be deeply evaluated and studied. This evaluation and study is accomplished with the tools developed and presented …