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Ministry of Higher and Secondary Specialized Education of the Republic of Uzbekistan
Combinational circuit; testing; concurrent error-detection system; logical complement; binary separable code; sum cod; Berger code; Bose-Lin code.
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Full-Text Articles in Engineering Mechanics
Boolean Complement Method For Combinational Circuits Testing Using Binary Separable Codes, A.H. Efanov
Boolean Complement Method For Combinational Circuits Testing Using Binary Separable Codes, A.H. Efanov
Journal of Tashkent Institute of Railway Engineers
The concurrent error-detection systems basic structural diagrams based on the check bits calculation and on the logical addition basis are described. A hybrid block diagram is presented in which the part of the diagnostics object outputs is transformed. The conditions for the use of binary separable codes for their use in the concurrent error-detection systems organization according to the method of logical addition are established.