VLSI and Circuits, Embedded and Hardware Systems Commons^™

N3asics: Designing Nanofabrics With Fine-Grained Cmos Integration, Pavan Panchapakeshan

Masters Theses 1911 - February 2014

Nanoscale-computing fabrics based on novel materials such as semiconductor nanowires, carbon nanotubes, graphene, etc. have been proposed in recent years. These fabrics employ unconventional manufacturing techniques like Nano-imprint lithography or Super-lattice Nanowire Pattern Transfer to produce ultra-dense nano-structures. However, one key challenge that has received limited attention is the interfacing of unconventional/self-assembly based approaches with conventional CMOS manufacturing to build integrated systems.

We propose a novel nanofabric approach that mixes unconventional nanomanufacturing with CMOS manufacturing flow and design rules to build a reliable nanowire-CMOS 3-D integrated fabric called N³ASICs with no new manufacturing constraints. In N³ASICs …

Secure And Energy Efficient Physical Unclonable Functions, Sudheendra Srivathsa

Masters Theses 1911 - February 2014

Physical Unclonable Functions are a unique class of circuits that leverage the inherentvariations in manufacturing process to create unique,unclonableIDs and secret keys.The distinguishing feature of PUFs is that even an untrusted foundry cannot create a copy of the circuit as it is impossible to control the manufacturing process variations.PUFs can operate reliably in presence of voltage and temperature variations. In thisthesis, weexplorethe security offered by PUFs and tradeoffs between different metrics such as uniqueness, reliability and energy consumption.Benefits of sub-threshold PUF operation and the use of delay based Arbiter PUFs and ring oscillator PUFs in low power applications is evaluated. …

A Study Of The Impact Of Computational Delays In Missile Interception Systems, Ye Xu

Masters Theses 1911 - February 2014

Most publications discussing missile interception systems assume a zero computer response time. This thesis studies the impact of computer response time on single-missile single-target and multiple- missile multiple-target systems. Simulation results for the final miss distance as the computer response time increases are presented. A simple online cooperative adjustment model for multiple-missile multiple-target system is created for the purpose of studying the computer delay effect.

Critical Area Driven Dummy Fill Insertion To Improve Manufacturing Yield, Nishant Dhumane

Masters Theses 1911 - February 2014

Non-planar surface may cause incorrect transfer of patterns during lithography. In today’s IC manufacturing, chemical mechanical polishing (CMP) is used for topographical planarization. Since polish rates for metals and oxides are different, dummy metal fills in layout is used to minimize post-CMP thickness variability. Traditional metal fill solutions focus on satisfying density target determined by layout density analysis techniques. These solutions may potentially reduce yield by increasing probability of failure (POF) due to particulate defects and also impact design performance. Layout design solutions that minimize POF and also improve surface planarity via dummy fill insertions have competing requirements for line …

Towards Logic Functions As The Device Using Spin Wave Functions Nanofabric, Prasad Shabadi

Masters Theses 1911 - February 2014

As CMOS technology scaling is fast approaching its fundamental limits, several new nano-electronic devices have been proposed as possible alternatives to MOSFETs. Research on emerging devices mainly focusses on improving the intrinsic characteristics of these single devices keeping the overall integration approach fairly conventional. However, due to high logic complexity and wiring requirements, the overall system-level power, performance and area do not scale proportional to that of individual devices.

Thereby, we propose a fundamental shift in mindset, to make the devices themselves more functional than simple switches. Our goal in this thesis is to develop a new nanoscale fabric paradigm …

A Theoretical Approach To Fault Analysis And Mitigation In Nanoscale Fabrics, Md Muwyid Uzzaman Khan

Masters Theses 1911 - February 2014

High defect rates are associated with novel nanodevice-based systems owing to unconventional and self-assembly based manufacturing processes. Furthermore, in emerging nanosystems, fault mechanisms and distributions may be very different from CMOS due to unique physical layer aspects, and emerging circuit and logic styles. Thus, theoretical fault models for nanosystems are necessary to extract detailed characteristics of fault generation and propagation. Using the intuition garnered from the theoretical analysis, modular and structural redundancy schemes can be specifically tailored to the intricacies of the fabric in order to achieve higher reliability of output signals.

In this thesis, we develop a detailed analytical …