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Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems
A Low-Voltage Mos Cascode Current Mirror For All Current Levels, Bradley Minch
A Low-Voltage Mos Cascode Current Mirror For All Current Levels, Bradley Minch
Bradley Minch
In this paper, we describe a simple low-voltage MOS cascode current mirror that functions well at all current levels, ranging from weak inversion to strong inversion. The circuit features a wide output voltage swing and requires an input voltage of approximately one diode drop plus a saturation voltage. We present experimental results from a version of the current mirror that was fabricated in a 0.5 μm CMOS process along with a comparison with several other current mirrors with respect both to required input voltage and to output compliance voltage.
Highly Linear, Wide-Dynamic-Range Multiple-Input Translinear Element Networks, Kofi Odame, Eric Mcdonald, Bradley Minch
Highly Linear, Wide-Dynamic-Range Multiple-Input Translinear Element Networks, Kofi Odame, Eric Mcdonald, Bradley Minch
Bradley Minch
In this paper, we propose a modification to the class of circuits known as multiple input translinear element (MITE) networks. Our proposed modification leads to a MITE network that is free from certain nonidealities encountered in previous implementations. Further, the new MITE network described here readily accommodates the use of bipolar junction transistors in the input and output stages, thus implying a significantly wider dynamic range than we can achieve using subthreshold MOSFETs.
Low Voltage And Performance Tunable Cmos Circuit Design Using Independently Driven Double Gate Mosfets, Arvind Kumar, Bradley Minch, Sandip Tiwari
Low Voltage And Performance Tunable Cmos Circuit Design Using Independently Driven Double Gate Mosfets, Arvind Kumar, Bradley Minch, Sandip Tiwari
Bradley Minch
Independently driven double-gate MOSFETs (DGFETs) facilitate design of analog circuits under digital logic constraints and provide in-circuit parameter adaptability through threshold voltage control. Threshold voltagetuning is achieved by biasing one of the two gates where as strong coupling of surface potentials at the two interfaces provides a low resistance feedback path. The geometry also allows a back-floating gate NVRAM structure with superior scalability and floating gate related analog applications without any read disturbance. This paper gives examples across breadth of circuits where this tunability is exploited.