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Articles 1 - 13 of 13
Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems
Randomized Routing On Fat-Trees, Ronald I. Greenberg
Randomized Routing On Fat-Trees, Ronald I. Greenberg
Ronald Greenberg
Fat-trees are a class of routing networks for hardware-efficient parallel computation. This paper presents a randomized algorithm for routing messages on a fat-tree. The quality of the algorithm is measured in terms of the load factor of a set of messages to be routed, which is a lower bound on the time required to deliver the messages. We show that if a set of messages has load factor lambda on a fat-tree with n processors, the number of delivery cycles (routing attempts) that the algorithm requires is O(lambda+lgnlglgn) with probability 1-O(1/ …
At The Tone, The Time Will Be... Unknown – A Perspective On The Evolution Of Time In Telecommunications, Robert Iannucci
At The Tone, The Time Will Be... Unknown – A Perspective On The Evolution Of Time In Telecommunications, Robert Iannucci
Robert A Iannucci
No abstract provided.
Embedded Systems As Datacenters, Robert Iannucci
Embedded Systems As Datacenters, Robert Iannucci
Robert A Iannucci
No abstract provided.
Platform Thinking In Embedded Systems, Robert Iannucci
Platform Thinking In Embedded Systems, Robert Iannucci
Robert A Iannucci
No abstract provided.
Configuring Client Software Using Remote Notification Us:6219698, Robert Iannucci, Chris Weikart
Configuring Client Software Using Remote Notification Us:6219698, Robert Iannucci, Chris Weikart
Robert A Iannucci
No abstract provided.
Computer System For Simulating Physical Processes Using Multiple Integer State Vectors Us:5594671, Hudong Chen, Peter Churchill, Robert Iannucci, Kim Molvig, Gregory Papadopoulos, Stephen Remondi, Christopher Teixeira, Kenneth Traub
Computer System For Simulating Physical Processes Using Multiple Integer State Vectors Us:5594671, Hudong Chen, Peter Churchill, Robert Iannucci, Kim Molvig, Gregory Papadopoulos, Stephen Remondi, Christopher Teixeira, Kenneth Traub
Robert A Iannucci
No abstract provided.
System For Synchronizing Execution By A Processing Element Of Threads Within A Process Using A State Indicator Us:5553305, Robert Iannucci, Steven Gregor
System For Synchronizing Execution By A Processing Element Of Threads Within A Process Using A State Indicator Us:5553305, Robert Iannucci, Steven Gregor
Robert A Iannucci
No abstract provided.
Multithreaded Computer Architecture: A Summary Of The State Of The Art, Robert Iannucci, Guang Gao, Robert Halstead, Burton Smith
Multithreaded Computer Architecture: A Summary Of The State Of The Art, Robert Iannucci, Guang Gao, Robert Halstead, Burton Smith
Robert A Iannucci
No abstract provided.
High Performance Memory System Pct:Ep0199134, Robert Iannucci
High Performance Memory System Pct:Ep0199134, Robert Iannucci
Robert A Iannucci
No abstract provided.
Parallel Machines: Parallel Machine Languages, Robert Iannucci
Parallel Machines: Parallel Machine Languages, Robert Iannucci
Robert A Iannucci
No abstract provided.
Method And Apparatus For Division Pct:Ep0075745, Robert Iannucci, James Kleinsteiber
Method And Apparatus For Division Pct:Ep0075745, Robert Iannucci, James Kleinsteiber
Robert A Iannucci
No abstract provided.
High Performance Memory System Utilizing Pipelining Techniques Us:4685088, Robert Iannucci
High Performance Memory System Utilizing Pipelining Techniques Us:4685088, Robert Iannucci
Robert A Iannucci
No abstract provided.
Method And Apparatus For Division Employing Associative Memory Us:4466077, Robert Iannucci, James Kleinsteiber
Method And Apparatus For Division Employing Associative Memory Us:4466077, Robert Iannucci, James Kleinsteiber
Robert A Iannucci
No abstract provided.