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Stream Processor Development Using Multi-Threshold Null Convention Logic Asynchronous Design Methodology, Wassim Khalil
Stream Processor Development Using Multi-Threshold Null Convention Logic Asynchronous Design Methodology, Wassim Khalil
Graduate Theses and Dissertations
Decreasing transistor feature size has led to an increase in the number of transistors in integrated circuits (IC), allowing for the implementation of more complex logic. However, such logic also requires more complex clock tree synthesis (CTS) to avoid timing violations as the clock must reach many more gates over larger areas. Thus, timing analysis requires significantly more computing power and designer involvement than in the past. For these reasons, IC designers have been pushed to nix conventional synchronous (SYNC) architecture and explore novel methodologies such as asynchronous, self-timed architecture. This dissertation evaluates the nominal active energy, voltage-scaled active energy, …
Efficacy Of Multi-Threshold Null Convention Logic In Low-Power Applications, Brent Bell
Efficacy Of Multi-Threshold Null Convention Logic In Low-Power Applications, Brent Bell
Graduate Theses and Dissertations
In order for an asynchronous design paradigm such as Multi-Threshold NULL Convention Logic (MTNCL) to be adopted by industry, it is important for circuit designers to be aware of its advantages and drawbacks especially with respect to power usage. The power tradeoff between MTNCL and synchronous designs depends on many different factors including design type, circuit size, process node, and pipeline granularity. Each of these design dimensions influences the active power and the leakage power comparisons. This dissertation analyzes the effects of different design dimensions on power consumption and the associated rational for these effects. Results show that while MTNCL …