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Signal Processing Commons

Open Access. Powered by Scholars. Published by Universities.®

2001

Logic Data Sequence

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Full-Text Articles in Signal Processing

Length Selectable, Hardware Efficient Pseudorandom Code Generator, John F. Brendle Jr., James P. Stephens Sr., Michael A. Temple, Robert S. Parks Sep 2001

Length Selectable, Hardware Efficient Pseudorandom Code Generator, John F. Brendle Jr., James P. Stephens Sr., Michael A. Temple, Robert S. Parks

AFIT Patents

A method and device for generating a pseudorandom electrical signal for enabling spread spectrum communication scrambling by directing data entry into pseudorandom number generator integrated circuit chip controlling registers using a length selectable feedback logic data sequence and either computer programmable selector means or manual selector means to communicate the logic data sequence characters to buffers. The logic data sequence characters are clocked to a pseudorandom number generating register of an integrated circuit chip and the pseudorandom electrical signal is generated by selectively tapping a signal code therefrom. The method and device features a pseudorandom electrical signal length varying capability …