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Computer and Systems Architecture Commons

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Full-Text Articles in Computer and Systems Architecture

A Memory-Centric Customizable Domain-Specific Fpga Overlay For Accelerating Machine Learning Applications, Atiyehsadat Panahi Aug 2022

A Memory-Centric Customizable Domain-Specific Fpga Overlay For Accelerating Machine Learning Applications, Atiyehsadat Panahi

Graduate Theses and Dissertations

Low latency inferencing is of paramount importance to a wide range of real time and userfacing Machine Learning (ML) applications. Field Programmable Gate Arrays (FPGAs) offer unique advantages in delivering low latency as well as energy efficient accelertors for low latency inferencing. Unfortunately, creating machine learning accelerators in FPGAs is not easy, requiring the use of vendor specific CAD tools and low level digital and hardware microarchitecture design knowledge that the majority of ML researchers do not possess. The continued refinement of High Level Synthesis (HLS) tools can reduce but not eliminate the need for hardware-specific design knowledge. The designs …


Structural Checking Tool Restructure And Matching Improvements, Derek Taylor May 2022

Structural Checking Tool Restructure And Matching Improvements, Derek Taylor

Graduate Theses and Dissertations

With the rising complexity and size of hardware designs, saving development time and cost by employing third-party intellectual property (IP) into various first-party designs has become a necessity. However, using third-party IPs introduces the risk of adding malicious behavior to the design, including hardware Trojans. Different from software Trojan detection, the detection of hardware Trojans in an efficient and cost-effective manner is an ongoing area of study and has significant complexities depending on the development stage where Trojan detection is leveraged. Therefore, this thesis research proposes improvements to various components of the soft IP analysis methodology utilized by the Structural …


Live Access Control Policy Error Detection Through Hardware, Bryce Mendenhall May 2022

Live Access Control Policy Error Detection Through Hardware, Bryce Mendenhall

Graduate Theses and Dissertations

Access Control (AC) is a widely used security measure designed to protect resources and infrastructure in an information system. The integrity of the AC policy is crucial to the protection of the system. Errors within an AC policy may cause many vulnerabilities such as information leaks, information loss, and malicious activities. Thus, such errors must be detected and promptly fixed. However, current AC error detection models do not allow for real-time error detection, nor do they provide the source of errors. This thesis presents a live error detection model called LogicDetect which utilizes emulated Boolean digital logic circuits to provide …


Computational Frameworks For Multi-Robot Cooperative 3d Printing And Planning, Laxmi Prasad Poudel Jul 2021

Computational Frameworks For Multi-Robot Cooperative 3d Printing And Planning, Laxmi Prasad Poudel

Graduate Theses and Dissertations

This dissertation proposes a novel cooperative 3D printing (C3DP) approach for multi-robot additive manufacturing (AM) and presents scheduling and planning strategies that enable multi-robot cooperation in the manufacturing environment. C3DP is the first step towards achieving the overarching goal of swarm manufacturing (SM). SM is a paradigm for distributed manufacturing that envisions networks of micro-factories, each of which employs thousands of mobile robots that can manufacture different products on demand. SM breaks down the complicated supply chain used to deliver a product from a large production facility from one part of the world to another. Instead, it establishes a network …


Automatic Performance Optimization On Heterogeneous Computer Systems Using Manycore Coprocessors, Chenggang Lai Dec 2018

Automatic Performance Optimization On Heterogeneous Computer Systems Using Manycore Coprocessors, Chenggang Lai

Graduate Theses and Dissertations

Emerging computer architectures and advanced computing technologies, such as Intel’s Many Integrated Core (MIC) Architecture and graphics processing units (GPU), provide a promising solution to employ parallelism for achieving high performance, scalability and low power consumption. As a result, accelerators have become a crucial part in developing supercomputers. Accelerators usually equip with different types of cores and memory. It will compel application developers to reach challenging performance goals. The added complexity has led to the development of task-based runtime systems, which allow complex computations to be expressed as task graphs, and rely on scheduling algorithms to perform load balancing between …