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Full-Text Articles in Computer Engineering
Design And Implementation Of A Low Cost And Portable Tactile Stimulator, Coşkun Kazma, Vecdi̇ Emre Levent, Merve Çardak, Ni̇zametti̇n Aydin
Design And Implementation Of A Low Cost And Portable Tactile Stimulator, Coşkun Kazma, Vecdi̇ Emre Levent, Merve Çardak, Ni̇zametti̇n Aydin
Turkish Journal of Electrical Engineering and Computer Sciences
When central nervous system has a problem, somatic area I and II respond to stimulation differently. Therefore, it is possible to identify some of the central nervous diseases when somatosensory on the fingertip is stimulated and responses are recorded and analyzed. We designed a system to stimulate the mechanoreceptors on fingertips. It is composed of a mechanical system for fingertip stimulation, an embedded controller, a control computer, and a software to control overall operation. During test, mechanoreceptors are stimulated according to the test protocols. Individuals' answers are recorded to be evaluated by the developed software. In this study, several design …
Highly Accurate And Sensitive Short Read Aligner, Mehmet Yağmur Gök, Sezer Gören Uğurdağ, Cem Ünsalan, Mahmut Şami̇l Sağiroğlu
Highly Accurate And Sensitive Short Read Aligner, Mehmet Yağmur Gök, Sezer Gören Uğurdağ, Cem Ünsalan, Mahmut Şami̇l Sağiroğlu
Turkish Journal of Electrical Engineering and Computer Sciences
Next-generation sequencing generates large numbers of short reads from DNA. This makes it difficult to process and store. Therefore, efficient sequence alignment and mapping techniques are needed in bioinformatics. Alignment and mapping are the basic steps involved in genetic data analysis. The Smith-Waterman (SW) algorithm, a well-known dynamic programming algorithm, is often used for this purpose. In this work, we propose to utilize Phred quality scores in Gotoh's affine gap model to increase the accuracy and sensitivity of the SW algorithm. Hardware platforms such as FPGAs and GPUs are commonly used to solve computationally expensive problems. In this work, a …
Modeling And Control Of A Permanent-Magnet Brushless Dc Motor Drive Using A Fractional Order Proportional-Integral-Derivative Controller, Swapnil Khubalkar, Anjali Junghare, Mohan Aware, Shantanu Das
Modeling And Control Of A Permanent-Magnet Brushless Dc Motor Drive Using A Fractional Order Proportional-Integral-Derivative Controller, Swapnil Khubalkar, Anjali Junghare, Mohan Aware, Shantanu Das
Turkish Journal of Electrical Engineering and Computer Sciences
This paper deals with the speed control of a permanent-magnet brushless direct current (PMBLDC) motor. A fractional order PID (FOPID) controller is used in place of the conventional PID controller. The FOPID controller is a generalized form of the PID controller in which the order of integration and differentiation is any real number. It is shown that the proposed controller provides a powerful framework to control the PMBLDC motor. Parameters of the controller are found by using a novel dynamic particle swarm optimization (dPSO) method. The frequency domain pole-zero (p-z) interlacing method is used to approximate the fractional order operator. …
High Dynamic Performance Of A Bldc Motor With A Front End Converter Using An Fpga Based Controller For Electric Vehicle Application, Praveen Yadav, Rajesh Poola, Khaja Najumudeen
High Dynamic Performance Of A Bldc Motor With A Front End Converter Using An Fpga Based Controller For Electric Vehicle Application, Praveen Yadav, Rajesh Poola, Khaja Najumudeen
Turkish Journal of Electrical Engineering and Computer Sciences
This paper focus on a novel operation of a brushless dc (BLDC) motor fed by a proportional integral (PI) controlled buck--boost converter supplemented with a battery to provide the required power to drive the BLDC motor. The operational characteristics of the proposed BLDC motor drive system for constant as well as step changes in dc link voltage of a front end converter controlled by a Xilinx System Generator (XSG) based PI controller for two quadrant operations are derived. Thus a field programmable gate array (FPGA) based PI controller manages the energy flow through the battery and the front end converter. …
Fpga Implementation Of A Hevc Deblocking Filter For Fast Processing Of Super High Resolution Applications, Awais Khan, Gulistan Raja
Fpga Implementation Of A Hevc Deblocking Filter For Fast Processing Of Super High Resolution Applications, Awais Khan, Gulistan Raja
Turkish Journal of Electrical Engineering and Computer Sciences
This paper proposes the architecture of a deblocking filter (DBF) that removes blocking artifacts in new emerging High Efficiency Video Coding (HEVC). A parallel architecture for both normal and strong filtering modes of HEVC is proposed. Distributed memories and two data paths increase the parallelism and make the architecture more efficient. The proposed architecture is described by Verilog and implemented on FPGA. The architecture can realize real time to compute 4K UHD video at 30 fps by using 46.65 million clocks with total equivalent gate count of 46K. The maximum delay time for output to come after taking input for …
Implementation Of A Modified Svpwm-Based Three-Phase Inverter With Reduced Switches Using A Single Dc Source For A Grid-Connected Pv System, Venkatesan Mani, Rajeswari Ramachandran, Deverajan Nanjundappan
Implementation Of A Modified Svpwm-Based Three-Phase Inverter With Reduced Switches Using A Single Dc Source For A Grid-Connected Pv System, Venkatesan Mani, Rajeswari Ramachandran, Deverajan Nanjundappan
Turkish Journal of Electrical Engineering and Computer Sciences
No abstract provided.
An Alternative Carry-Save Arithmetic For New Generation Field Programmable Gate Arrays, Uğur Çi̇ni̇, Mustafa Aktan, Avni̇ Morgül
An Alternative Carry-Save Arithmetic For New Generation Field Programmable Gate Arrays, Uğur Çi̇ni̇, Mustafa Aktan, Avni̇ Morgül
Turkish Journal of Electrical Engineering and Computer Sciences
In this work, a double carry-save addition operation is proposed, which is efficiently synthesized for 6-input LUT-based field programmable gate arrays (FPGAs). The proposed arithmetic operation is based on redundant number representation and provides carry propagation-free addition. Using the proposed arithmetic operation, a compact and fast multiply and accumulate unit is designed. To our knowledge, the proposed design provides the fastest multiply-add operation for 6-input LUT-based FPGA systems. A finite impulse response filter implementation is given to show the performance of the proposed structure. The proposed implementation provides a dramatic performance increase, which is at least 2 times faster than …
Designing And Implementing A Reliable Thermal Monitoring System Based On The 1-Wire Protocol On Fpga For A Leo Satellite, Reza Omidi Gosheblagh, Karim Mohammadi
Designing And Implementing A Reliable Thermal Monitoring System Based On The 1-Wire Protocol On Fpga For A Leo Satellite, Reza Omidi Gosheblagh, Karim Mohammadi
Turkish Journal of Electrical Engineering and Computer Sciences
Thermal control and monitoring is one of the most important factors in the design of satellite systems. An appropriate thermal design should make sure that the satellite's sensitive components remain in their nominated range, even under the vacuum condition of outer space. To achieve this purpose, a reliable and stable monitoring system is required. This paper proposes a monitoring system based on the 1-wire protocol, which provides the reliability requirements in the sensor networking and bus controller sections. In the networking section, we outline some practical topologies and discuss on their complexity and reliability. Despite the fact that the point-to-point …
System Designs To Perform Bioinformatics Sequence Alignment, Çağlar Yilmaz, Mustafa Gök
System Designs To Perform Bioinformatics Sequence Alignment, Çağlar Yilmaz, Mustafa Gök
Turkish Journal of Electrical Engineering and Computer Sciences
The emerging field of bioinformatics uses computing as a tool to understand biology. Biological data of organisms (nucleotide and amino acid sequences) are stored in databases that contain billions of records. In order to process the vast amount of data in a reasonable time, high-performance analysis systems are developed. The main operation shared by the analysis tools is the search for matching patterns between sequences of data (sequence alignment). In this paper, we present 2 systems that can perform pairwise and multiple sequence alignment operations. Through the optimized design methods, proposed systems achieve up to 3.6 times more performance compared …
New Approach Fpga-Based Implementation Of Discontinuous Svpwm}, Tole Sutikno, Auzani Jidin, Nik Rumzi Nik Idris
New Approach Fpga-Based Implementation Of Discontinuous Svpwm}, Tole Sutikno, Auzani Jidin, Nik Rumzi Nik Idris
Turkish Journal of Electrical Engineering and Computer Sciences
The discontinuous space vector pulse-width modulation (DSVPWM) is a well-known technique offering lower switching losses than continuous SVPWM. At the same, average switching frequency, or a switching frequency 1.5 times higher than utilized in continuous SVPWM, the discontinuous SVPWM results in lower current harmonic distortions than that obtained in continuous SVPWM at high modulation indices. This paper is concerned with the design and realization of new FPGA approach based a 5-segment discontinuous SVPWM operated at 40 kHz switching frequency. It will be shown that the implementation of the discontinuous SVPWM utilized in FPGA, to execute some complex tasks, is simplified …