Computer Engineering Commons^™

Svar: A Virtual Machine For Portable Code On Reconfigurable Accelerators, Nathaniel Fredricks

Computer Science and Computer Engineering Undergraduate Honors Theses

The SPAR-2 array processor was designed as an overlay architecture for implementation on Xilinx Field Programmable Gate Arrays (FPGAs). As an overlay, the SPAR-2 array processor can be configured to take advantage of the specific resources available on different FPGAs. However once configured, the SPAR-2 requires programmer’s to have knowledge of the low level architecture, and write platform-specific code. In this thesis SVAR, a hardware/software co-designed virtual machine, is proposed that runs on the SPAR-2. SVAR allows programmers to write portable, platform-independent code once and have it interpreted for any specific configuration. Results are presented that verify the virtual machine …