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Computer Engineering Commons

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Full-Text Articles in Computer Engineering

Computational Capacity And Energy Consumption Of Complex Resistive Switch Networks, Jens Bürger, Alireza Goudarzi, Darko Stefanovic, Christof Teuscher Dec 2015

Computational Capacity And Energy Consumption Of Complex Resistive Switch Networks, Jens Bürger, Alireza Goudarzi, Darko Stefanovic, Christof Teuscher

Electrical and Computer Engineering Faculty Publications and Presentations

Resistive switches are a class of emerging nanoelectronics devices that exhibit a wide variety of switching characteristics closely resembling behaviors of biological synapses. Assembled into random networks, such resistive switches produce emerging behaviors far more complex than that of individual devices. This was previously demonstrated in simulations that exploit information processing within these random networks to solve tasks that require nonlinear computation as well as memory. Physical assemblies of such networks manifest complex spatial structures and basic processing capabilities often related to biologically-inspired computing. We model and simulate random resistive switch networks and analyze their computational capacities. We provide a …


Semi-Modular Delay Model Revisited In Context Of Relative Timing, Hoon Park, Anping He, Marly Roncken, Xiaoyu Song Feb 2015

Semi-Modular Delay Model Revisited In Context Of Relative Timing, Hoon Park, Anping He, Marly Roncken, Xiaoyu Song

Electrical and Computer Engineering Faculty Publications and Presentations

A new definition of semi-modularity to accommodate relative timing constraints in self-timed circuits is presented. While previous definitions ignore such constraints, the new definition takes them into account. The difference on a design solution for a well-known speed-independent circuit implementation of the Muller C element and a set of relative timing constraints that renders the implementation hazard free is illustrated. The old definition produces a false semi-modularity conflict that cannot exist due to the set of imposed constraints. The new definition correctly accepts the solution.


Modular Timing Constraints For Delay-Insensitive Systems, Hoon Park, Anping He, Marly Roncken, Xiaoyu Song, Ivan Sutherland Jan 2015

Modular Timing Constraints For Delay-Insensitive Systems, Hoon Park, Anping He, Marly Roncken, Xiaoyu Song, Ivan Sutherland

Electrical and Computer Engineering Faculty Publications and Presentations

This paper introduces ARCtimer, a framework for modeling, generating, verifying, and enforcing timing constraints for individual self-timed handshake components. The constraints guarantee that the component’s gate-level circuit implementation obeys the component’s handshake protocol specification. Because the handshake protocols are delayinsensitive, self-timed systems built using ARCtimer-verified components are also delay-insensitive. By carefully considering time locally, we can ignore time globally. ARCtimer comes early in the design process as part of building a library of verified components for later system use. The library also stores static timing analysis (STA) code to validate and enforce the component’s constraints in any self-timed system built …