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Full-Text Articles in Computer Engineering

Poster: Indoor Navigation For Visually Impaired People With Vertex Colored Graphs, Pei Du, Nirupama Bulusu Jun 2022

Poster: Indoor Navigation For Visually Impaired People With Vertex Colored Graphs, Pei Du, Nirupama Bulusu

Electrical and Computer Engineering Faculty Publications and Presentations

Visually impaired people face many daily encumbrances. Traditional visual enhancements do not suffice to navigate indoor environments. In this paper, we explore path finding algorithms such as Dijkstra and A* combined with graph coloring to find a safest and shortest path for visual impaired people to navigate indoors. Our mobile application is based on a database which stores the locations of several spots in the building and their corresponding label. Visual impaired people select the start and destination when they want to find their way, and our mobile application will show the appropriate path which guarantees their safety.


Privacy-Preserving Information Security For The Energy Grid Of Things, Mohammed Alsaid, Nirupama Bulusu, Abdullah Bargouti, N. Sonali Fernando, John M. Acken, Tylor E. Slay, Robert B. Bass Apr 2022

Privacy-Preserving Information Security For The Energy Grid Of Things, Mohammed Alsaid, Nirupama Bulusu, Abdullah Bargouti, N. Sonali Fernando, John M. Acken, Tylor E. Slay, Robert B. Bass

Electrical and Computer Engineering Faculty Publications and Presentations

Smart grid infrastructure relies on information exchange between multiple actors in order to ensure system reliability. These actors include but are not limited to smart loads, grid control, and energy management technologies. As information exchange between these actors is susceptible to cyber-attacks, security and privacy issues are indispensable to ensure a reliable and stable grid. This position paper proposes a privacy-preserving, trust-augmented secure scheme for a smart grid implementation.


A Graph-Based Approach To Boundary Estimation With Mobile Sensors, Sean Onufer Stalley, Dingyu Wang, Gautam Dasarathy, John Lipor Jan 2022

A Graph-Based Approach To Boundary Estimation With Mobile Sensors, Sean Onufer Stalley, Dingyu Wang, Gautam Dasarathy, John Lipor

Electrical and Computer Engineering Faculty Publications and Presentations

We consider the problem of adaptive sampling for boundary estimation, where the goal is to identify the two dimensional spatial extent of a phenomenon of interest. Motivated by applications in estimating the spread of wildfires with a mobile sensor, we present a novel graph-based algorithm that is efficient in both the number of samples taken and the distance traveled. The key idea behind our approach is that by sampling locations close to known cut edges (edges whose vertices lie on opposite sides of the boundary), we can reliably find additional cut edges. Our approach repeats this process of using the …


A Golden Age For Computing Frontiers, A Dark Age For Computing Education?, Christof Teuscher May 2021

A Golden Age For Computing Frontiers, A Dark Age For Computing Education?, Christof Teuscher

Electrical and Computer Engineering Faculty Publications and Presentations

There is no doubt that the body of knowledge spanned by the computing disciplines has gone through an unprecedented expansion, both in depth and breadth, over the last century. In this position paper, we argue that this expansion has led to a crisis in computing education: quite literally the vast majority of the topics of interest of this conference are not taught at the undergraduate level and most graduate courses will only scratch the surface of a few selected topics. But alas, industry is increasingly expecting students to be familiar with emerging topics, such as neuromorphic, probabilistic, and quantum computing, …


A Time-Efficient Cmos-Memristive Programmable Circuit Realizing Logic Functions In Generalized And-Xor Structures, Muayad Aljafar, Marek Perkowski, John M. Acken, Robin Tan Jan 2018

A Time-Efficient Cmos-Memristive Programmable Circuit Realizing Logic Functions In Generalized And-Xor Structures, Muayad Aljafar, Marek Perkowski, John M. Acken, Robin Tan

Electrical and Computer Engineering Faculty Publications and Presentations

This paper describes a CMOS-memristive Programmable Logic Device connected to CMOS XOR gates (mPLD-XOR) for realizing multi-output functions well-suited for two-level {NAND, AND, NOR, OR}-XOR based design. This structure is a generalized form of AND-XOR logic where any combination of NAND, AND, NOR, OR, and literals can replace the AND level. For mPLD-XOR, the computational delay, which is measured as the number of clock cycles, equals the maximum number of inputs to any output XOR gate of a function assuming that the number of XOR gates is large enough to calculate the outputs of the function simultaneously. The input levels …


Memcapacitive Devices In Logic And Crossbar Applications, Dat Tran, Christof Teuscher Apr 2017

Memcapacitive Devices In Logic And Crossbar Applications, Dat Tran, Christof Teuscher

Electrical and Computer Engineering Faculty Publications and Presentations

Over the last decade, memristive devices have been widely adopted in computing for various conventional and unconventional applications. While the integration density, memory property, and nonlinear characteristics have many benefits, reducing the energy consumption is limited by the resistive nature of the devices. Memcapacitors would address that limitation while still having all the benefits of memristors. Recent work has shown that with adjusted parameters during the fabrication process, a metal-oxide device can indeed exhibit a memcapacitive behavior. We introduce novel memcapacitive logic gates and memcapacitive crossbar classifiers as a proof of concept that such applications can outperform memristor-based architectures. The …


A Backend Framework For The Efficient Management Of Power System Measurements, Benjamin Mccamish, Rich Meier, Jordan Landford, Robert B. Bass, David Chiu, Eduardo Cotilla-Sanchez May 2016

A Backend Framework For The Efficient Management Of Power System Measurements, Benjamin Mccamish, Rich Meier, Jordan Landford, Robert B. Bass, David Chiu, Eduardo Cotilla-Sanchez

Electrical and Computer Engineering Faculty Publications and Presentations

Increased adoption and deployment of phasor measurement units (PMU) has provided valuable fine-grained data over the grid. Analysis over these data can provide insight into the health of the grid, thereby improving control over operations. Realizing this data-driven control, however, requires validating, processing and storing massive amounts of PMU data. This paper describes a PMU data management system that supports input from multiple PMU data streams, features an event-detection algorithm, and provides an efficient method for retrieving archival data. The event-detection algorithm rapidly correlates multiple PMU data streams, providing details on events occurring within the power system. The event-detection algorithm …


Computational Capacity And Energy Consumption Of Complex Resistive Switch Networks, Jens Bürger, Alireza Goudarzi, Darko Stefanovic, Christof Teuscher Dec 2015

Computational Capacity And Energy Consumption Of Complex Resistive Switch Networks, Jens Bürger, Alireza Goudarzi, Darko Stefanovic, Christof Teuscher

Electrical and Computer Engineering Faculty Publications and Presentations

Resistive switches are a class of emerging nanoelectronics devices that exhibit a wide variety of switching characteristics closely resembling behaviors of biological synapses. Assembled into random networks, such resistive switches produce emerging behaviors far more complex than that of individual devices. This was previously demonstrated in simulations that exploit information processing within these random networks to solve tasks that require nonlinear computation as well as memory. Physical assemblies of such networks manifest complex spatial structures and basic processing capabilities often related to biologically-inspired computing. We model and simulate random resistive switch networks and analyze their computational capacities. We provide a …


Semi-Modular Delay Model Revisited In Context Of Relative Timing, Hoon Park, Anping He, Marly Roncken, Xiaoyu Song Feb 2015

Semi-Modular Delay Model Revisited In Context Of Relative Timing, Hoon Park, Anping He, Marly Roncken, Xiaoyu Song

Electrical and Computer Engineering Faculty Publications and Presentations

A new definition of semi-modularity to accommodate relative timing constraints in self-timed circuits is presented. While previous definitions ignore such constraints, the new definition takes them into account. The difference on a design solution for a well-known speed-independent circuit implementation of the Muller C element and a set of relative timing constraints that renders the implementation hazard free is illustrated. The old definition produces a false semi-modularity conflict that cannot exist due to the set of imposed constraints. The new definition correctly accepts the solution.


Modular Timing Constraints For Delay-Insensitive Systems, Hoon Park, Anping He, Marly Roncken, Xiaoyu Song, Ivan Sutherland Jan 2015

Modular Timing Constraints For Delay-Insensitive Systems, Hoon Park, Anping He, Marly Roncken, Xiaoyu Song, Ivan Sutherland

Electrical and Computer Engineering Faculty Publications and Presentations

This paper introduces ARCtimer, a framework for modeling, generating, verifying, and enforcing timing constraints for individual self-timed handshake components. The constraints guarantee that the component’s gate-level circuit implementation obeys the component’s handshake protocol specification. Because the handshake protocols are delayinsensitive, self-timed systems built using ARCtimer-verified components are also delay-insensitive. By carefully considering time locally, we can ignore time globally. ARCtimer comes early in the design process as part of building a library of verified components for later system use. The library also stores static timing analysis (STA) code to validate and enforce the component’s constraints in any self-timed system built …


An Emotional Mimicking Humanoid Biped Robot And Its Quantum Control Based On The Constraint Satisfaction Model, Quay Williams, Scott Bogner, Michael Kelley, Carolina Castillo, Martin Lukac, Dong Hwa Kim, Jeff S. Allen, Mathias I. Sunardi, Sazzad Hossain, Marek Perkowski May 2007

An Emotional Mimicking Humanoid Biped Robot And Its Quantum Control Based On The Constraint Satisfaction Model, Quay Williams, Scott Bogner, Michael Kelley, Carolina Castillo, Martin Lukac, Dong Hwa Kim, Jeff S. Allen, Mathias I. Sunardi, Sazzad Hossain, Marek Perkowski

Electrical and Computer Engineering Faculty Publications and Presentations

The paper presents a humanoid robot that responds to human gestures seen by a camera. The behavior of the robot can be completely deterministic as specified by a Finite State Machine that maps the sensor signals to the effector signals. This model is further extended to the constraints-satisfaction based model that links robots vision, motion, emotional behavior and planning. One way of implementing this model is to use adiabatic quantum computer which quadratically speeds-up every constraint problem and will be thus necessary to solve large problems of this type. We propose to use the remotely-connected Orion system by DWAVE Corporation.


Constructive Induction Machines For Data Mining, Marek Perkowski, Stanislaw Grygiel, Qihong Chen, Dave Mattson Mar 1999

Constructive Induction Machines For Data Mining, Marek Perkowski, Stanislaw Grygiel, Qihong Chen, Dave Mattson

Electrical and Computer Engineering Faculty Publications and Presentations

"Learning Hardware" approach involves creating a computational network based on feedback from the environment (for instance, positive and negative examples from the trainer), and realizing this network in an array of Field Programmable Gate Arrays (FPGAs). Computational networks can be built based on incremental supervised learning (Neural Net training) or global construction (Decision Tree design). Here we advocate the approach to Learning Hardware based on Constructive Induction methods of Machine Learning (ML) using multivalued functions. This is contrasted with the Evolvable Hardware (EHW) approach in which learning/evolution is based on the genetic algorithm only.