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Hardware Systems

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Full-Text Articles in Computer Engineering

Qasm-To-Hls: A Framework For Accelerating Quantum Circuit Emulation On High-Performance Reconfigurable Computers, Anshul Maurya Dec 2023

Qasm-To-Hls: A Framework For Accelerating Quantum Circuit Emulation On High-Performance Reconfigurable Computers, Anshul Maurya

Theses and Dissertations

High-performance reconfigurable computers (HPRCs) make use of Field-Programmable Gate Arrays (FPGAs) for efficient emulation of quantum algorithms. Generally, algorithm-specific architectures are implemented on the FPGAs and there is very little flexibility. Moreover, mapping a quantum algorithm onto its equivalent FPGA emulation architecture is challenging. In this work, we present an automation framework for converting quantum circuits to their equivalent FPGA emulation architectures. The framework processes quantum circuits represented in Quantum Assembly Language (QASM) and derives high-level descriptions of the hardware emulation architectures for High-Level Synthesis (HLS) on HPRCs. The framework generates the code for a heterogeneous architecture consisting of a …


Adaptive-Hybrid Redundancy For Radiation Hardening, Nicolas S. Hamilton Sep 2019

Adaptive-Hybrid Redundancy For Radiation Hardening, Nicolas S. Hamilton

Theses and Dissertations

An Adaptive-Hybrid Redundancy (AHR) mitigation strategy is proposed to mitigate the effects of Single Event Upset (SEU) and Single Event Transient (SET) radiation effects. AHR is adaptive because it switches between Triple Modular Redundancy (TMR) and Temporal Software Redundancy (TSR). AHR is hybrid because it uses hardware and software redundancy. AHR is demonstrated to run faster than TSR and use less energy than TMR. Furthermore, AHR allows space vehicle designers, mission planners, and operators the flexibility to determine how much time is spent in TMR and TSR. TMR mode provides faster processing at the expense of greater energy usage. TSR …