Open Access. Powered by Scholars. Published by Universities.®

Computer Engineering Commons

Open Access. Powered by Scholars. Published by Universities.®

Articles 1 - 5 of 5

Full-Text Articles in Computer Engineering

Introduction To Signal Timing & Traffic Control, Sarah V. Hernandez, Mariah Crew, Karla Diaz-Corro, Taslima Akter Jul 2017

Introduction To Signal Timing & Traffic Control, Sarah V. Hernandez, Mariah Crew, Karla Diaz-Corro, Taslima Akter

Civil Engineering Teaching and Learning

The purpose of these lesson plans is to introduce students to traffic signalization basics. Students will be lead through a series of mini-lectures on traffic control and signalization including a discussion on the limitations and benefits of traffic signalization. The lesson plans compliment a computer simulation “game” in which students act as manual operators for a single up to four by four gridded intersection. Students attempt to control the progression of signals to understand the relationship between signal timing and user delay. Through experimentation with the simulation, students generate a presentation discussing the benefits and drawbacks of signal timing and …


A Hybrid Partially Reconfigurable Overlay Supporting Just-In-Time Assembly Of Custom Accelerators On Fpgas, Zeyad Tariq Aklah May 2017

A Hybrid Partially Reconfigurable Overlay Supporting Just-In-Time Assembly Of Custom Accelerators On Fpgas, Zeyad Tariq Aklah

Graduate Theses and Dissertations

The state of the art in design and development flows for FPGAs are not sufficiently mature to allow programmers to implement their applications through traditional software development flows. The stipulation of synthesis as well as the requirement of background knowledge on the FPGAs' low-level physical hardware structure are major challenges that prevent programmers from using FPGAs. The reconfigurable computing community is seeking solutions to raise the level of design abstraction at which programmers must operate, and move the synthesis process out of the programmers' path through the use of overlays. A recent approach, Just-In-Time Assembly (JITA), was proposed that enables …


Project Pradio, Trigg T. La Tour May 2017

Project Pradio, Trigg T. La Tour

Computer Science and Computer Engineering Undergraduate Honors Theses

This paper examines the design and manufacturing of a device that allows two or more users to share a wireless audio stream. Effectively, this allows a group of people to listen to the same audio in a synchronized manner. The product was unable to be completed in the allotted time. Regardless, significant progress was made and valuable insight into the circuit board design process was gained.


Transportation Engineering: Traffic Control Simulator, Sarah V. Hernandez, Karla Diaz-Corro, Taslima Akter, Magdalena Asborno, Fu Durandal Apr 2017

Transportation Engineering: Traffic Control Simulator, Sarah V. Hernandez, Karla Diaz-Corro, Taslima Akter, Magdalena Asborno, Fu Durandal

Civil Engineering Teaching and Learning

The purpose of these lesson plans is to introduce students to traffic signalization basics. Students will be lead through a series of mini-lectures on traffic control and signalization including a discussion on the limitations and benefits of traffic signalization. The lesson plans compliment a computer simulation “game” in which students act as manual operators for a single up to four by four gridded intersection. Students attempt to control the progression of signals to understand the relationship between signal timing and user delay. Through experimentation with the simulation, students generate a presentation discussing the benefits and drawbacks of signal timing and …


Exploiting Hardware Abstraction For Parallel Programming Framework: Platform And Multitasking, Hongyuan Ding Jan 2017

Exploiting Hardware Abstraction For Parallel Programming Framework: Platform And Multitasking, Hongyuan Ding

Graduate Theses and Dissertations

With the help of the parallelism provided by the fine-grained architecture, hardware accelerators on Field Programmable Gate Arrays (FPGAs) can significantly improve the performance of many applications. However, designers are required to have excellent hardware programming skills and unique optimization techniques to explore the potential of FPGA resources fully. Intermediate frameworks above hardware circuits are proposed to improve either performance or productivity by leveraging parallel programming models beyond the multi-core era.

In this work, we propose the PolyPC (Polymorphic Parallel Computing) framework, which targets enhancing productivity without losing performance. It helps designers develop parallelized applications and implement them on FPGAs. …