Engineering Commons^™

Mems Fabrication Of A Peristaltic Pump, Nicholas Amendola

Journal of the Microelectronic Engineering Conference

No abstract provided.

Automated Droplet Manipulation Through Electrowetting On Dielectric For Solid-Phase Oligonucleotide Synthesis, Hee Tae An

Journal of the Microelectronic Engineering Conference

No abstract provided.

Development Of A Lfle Double Pattern Process For Te Mode Photonic Devices, Mycahya Eggleston

Journal of the Microelectronic Engineering Conference

No abstract provided.

Stochastic Adc Using Digital Standard Cells, Zachary Baltzer

Journal of the Microelectronic Engineering Conference

No abstract provided.

Stochastic Adc Using Standard Cells: Design, Implementation And Eventual Fabrication Of A 4.7-Bit Adc, Zachary Baltzer

Journal of the Microelectronic Engineering Conference

As process nodes shrink, analog design increasingly becomes difficult due to space, signal, and noise concerns. With highly synthesized digital design, analog design innovation lags as these specific considerations are to be accounted for. The analog to digital converter, proposed by Weaver et al., is a completely digital design relying on comparator offsets to produce a digital counter that tracks the difference between the input voltage and a reference voltage. To soon be fabricated on GlobalFoundry’s 130 nm CMOS process, the proposed 5-bit ADC uses approximately 90,000 transistors with 1,500 comparators and a full-adder tree consisting of 1,500 adders to …

Large Area Monolayer Doping Development, Brian Novak

Journal of the Microelectronic Engineering Conference

No abstract provided.

Large Area Monolayer Doping Development, Brian Novak

Journal of the Microelectronic Engineering Conference

No abstract provided.

Large Area Monolayer Doping Development, Brian Novak

Journal of the Microelectronic Engineering Conference

One of the challenges facing the semiconductor industry as the scale of transistors shrink into nanometer sizes is the creation of ultra-shallow junctions. Furthermore, device geometry is morphing from planar to 3-dimensional structures which increases the need for conformal ultra-shallow junctions. The industry has relied on ion implantation to push the boundary of semiconductor doping, however effects such as transient enhanced diffusion caused by lattice damaged by implantation have impeded the creation of the desired ultra-shallow junctions. A new technique known as monolayer doping is one strategy to help solve both ultra-shallow junction formation as well as conformal doping. Monolayer …

Ald Of Ferroelectric Hfo2 Thin Films, Casey J. Gonta

Journal of the Microelectronic Engineering Conference

No abstract provided.

Atomic Layer Of Deposition Of Ferroelectric Hfo2, Casey J. Gonta

Journal of the Microelectronic Engineering Conference

No abstract provided.

Atomic Layer Of Deposition Of Ferroelectric Hfo2, Casey J. Gonta

Journal of the Microelectronic Engineering Conference

Ferroelectric (FE) materials exhibit spontaneous polarization making them particularly attractive for non-volatile memory and logic applications. Recently, doped hafnium oxide has shown to be ferroelectric in nature expanding its applications to these areas of interest. Ferroelectricity has been reported in atomic layer deposition (ALD) of HfO2 with Al, Y, or Si dopants. Previous work at RIT demonstrated functional ferroelectric field effect transistors (FeFETs) using silicon doped HfO2 (Si:HfO2) as the gate dielectric.

The new addition of a Savannah ALD system at RIT has made deposition of doped HfO2 films possible. Recipes have been developed for deposition of aluminum doped HfO2 …

Development Of A Lfle Double Pattern Process For Te Mode Photonic Devices, Mycahya Eggleston

Journal of the Microelectronic Engineering Conference

As the popularity of photonic devices and their uses increases, reliable manufacturing processes will need to be developed to make them more cost effective. Many companies still utilize i-line lithography, with very robust processes. Photonic devices require feature sizes often too small to be fabricated on i-line tools, especially for TE mode devices. In order to fabricate these devices, a form of double patterning will need to be developed.

Proposed is a Litho-Freeze-Litho-Etch (LFLE) process that can achieve the feature sizes capable of fabricating TE mode photonic devices. This project encompasses design, development, and characterization of a LFLE process that …

Mgf2/Ta2o5 Anti Reflective Coating Multilayers For Amo Solar Cells, Dylan J. Mafrici

Journal of the Microelectronic Engineering Conference

No abstract provided.

Mgf2/Ta2o5 Anti Reflective Coating For 3rd Generation Solar Cells, Dylan J. Mafrici

Journal of the Microelectronic Engineering Conference

No abstract provided.

Mgf2/Ta2o5 Anti Reflective Coating For 3rd Generation Solar Cells, Dylan J. Mafrici

Journal of the Microelectronic Engineering Conference

A bi-layer anti reflection coating (ARC) composed of MgF2-Ta2O5 was designed using a rigorous mathematical approach and was experimentally tested on a commercial grade solar cell as a proof of concept that the coating can be applied to multi-junction solar cells. A reactive sputter process was used to sputter tantalum oxide and a thermal evaporation process was used for depositing magnesium chloride. The thickness values of each film were measured via profilometry, elipsometry, and reflectometry techniques. Elipsometry was also used to determine the film material’s respective index of refraction. Diffuse field reflectance measurements of each film were made using an …

Giant Magneto-Impedance Effect In Multilayer Thin Film Sensors, Sean H. Heinze

Journal of the Microelectronic Engineering Conference

No abstract provided.

Giant Magneto-Impedance Effect In Multilayer Thin Film Sensors, Sean H. Heinze

Journal of the Microelectronic Engineering Conference

Over the last couple of decades, the Giant Magneto-Impedance (GMI) effect has become a well-known phenomenon, especially for its use in magnetic field sensing applications. Discussed in this paper will be a comprehensive summary of the fundamental theory behind the GMI effect, as well as the design, fabrication, and test of multilayer thin film GMI sensors. In recent research, multilayer GMI sensors have been shown to obtain GMI sensitives ranging from 10 – 100 times more than that of currently in industry Giant Magnetoresistance (GMR) sensors, comparable to that of its bulk microwire counterpart. To investigate this, a tri-layer film …

Giant Magneto-Impedance Effect In Multilayer Thin Film Sensors, Sean H. Heinze

Journal of the Microelectronic Engineering Conference

No abstract provided.

Investigation Of Ald Dielectrics In Silicon Capacitors, Enri Marini

Journal of the Microelectronic Engineering Conference

No abstract provided.

Investigation Of Ald Dielectrics In Silicon Capacitors, Enri Marini

Journal of the Microelectronic Engineering Conference

The goal of this analysis is to scale aluminum oxide films deposited by ALD for use in transistor fabrication with silicon and silicon-germanium substrates and the two metals offer varying work functions for gate control on the transistor level. MOS capacitors were fabricated on six-inch silicon substrates consisting of aluminum-oxide (Al2O3) as the dielectric and aluminum as the gate metal. The Al2O3 was deposited using atomic layer deposition (ALD) with thicknesses of 15nm and 20nm, while the aluminum gate metal was DC sputter deposited containing thickness of approximately 1200 A° . Capacitance values were measured in order to back-calculate the …

Encapsulation For Igzo Thin Film Transistors, Julia Okvath

Journal of the Microelectronic Engineering Conference

No abstract provided.

Encapsulation Of Indium-Gallium-Zinc Oxide Thin Film Transistors, Julia Okvath

Journal of the Microelectronic Engineering Conference

No abstract provided.

Capping Of Indium-Gallium-Zinc Oxide Thin-Film Transistors Using Ald Materials, Julia Okvath

Journal of the Microelectronic Engineering Conference

Indium-gallium-zinc oxide (IGZO) thin-film transis-tors (TFTs) used in LCD display technologies exhibit significant instability when exposed to thermal stress above 100◦C. Bottom-gate TFTs subjected to prolonged heat treatment at 140◦C experience a voltage shift of 2 V over 120 minutes. Double-gate TFTs experience an even more pronounced shift of 7 V over 120 minutes. This instability is believed to be associated with water molecules incorporated in the PECVD TEOS SiO2 passivation layer, with an enhanced response in the double-gate device due to the liberation of monatomic hydrogen from the reaction of water with the top-gate metal. This research investigates the …

Process Development Of Sidewall Spacer Features For Sub-300nm Dense Silicon Finfets, Salwan Omar

Journal of the Microelectronic Engineering Conference

No abstract provided.

Process Development Of Sidewall Spacer Features For Sub-300nm Dense Silicon Finfets, Salwan Omar

Journal of the Microelectronic Engineering Conference

An investigation of the ASML PAS5500 5X reduction i-line stepper and RIE systems capabilities of defining sub-300nm nitride sidewall spacers to create dense 200nm silicon FinFETs on a 400nm pitch has been experimentally undertaken in the SMFL at RIT. The work presented in this project involves photoresist over-exposure through annular illumination with NA equal to 0.6, sigma inner equal to 0.535, and sigma outer equal 0.9 to narrow down the critical dimensions of the photoresist features in the 200nm range. Diluted OiR620 photoresist with PGMEA 1:1 ratio is used to obtain a thin coating of 5.5nm film thickness. A thin …

Process Development Of Sidewall Spacer Features For Sub-300nm Dense Silicon Finfets, Salwan Omar

Journal of the Microelectronic Engineering Conference

No abstract provided.

Electrostatically Actuated Mems Resonator, Daniel J.H. Shyer

Journal of the Microelectronic Engineering Conference

No abstract provided.

Mems Electrostatically Actuated Resonator, Daniel J.H. Shyer

Journal of the Microelectronic Engineering Conference

No abstract provided.

Mems Electrostatically Actuated Resonator, Daniel J.H. Shyer

Journal of the Microelectronic Engineering Conference

A MEMS electrostatically actuated resonator with fixed-fixed and fixed-free cantilever beams is designed, simulated, fabricated, and tested. The fabrication of the MEMS resonators uses RIT’s MEMS fabrication 2016 process flow which is a surface micromachining process. The released fixed-free devices tested showed an increasing change in capacitance with an increasing actuation voltage. Inspection of the released fixed-fixed devices has a compressive stress in the second polysilicon film that causes the cantilever beam to bend above the actuation and sensing pads. Testing for resonance has not been successful. Some new considerations for the MEMS fabrication process and design are discussed.

Investigation Of Mim Structures As Selector Devices For Crossbar Memory Arrays, Peter Vowell

Journal of the Microelectronic Engineering Conference

No abstract provided.