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Electrical and Electronics

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Air Force Institute of Technology

2009

Gate array circuits

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Characterization Of Hardening By Design Techniques On Commercial, Small Feature Sized Field-Programmable Gate Arrays, Thomas E. Simmons Mar 2009

Characterization Of Hardening By Design Techniques On Commercial, Small Feature Sized Field-Programmable Gate Arrays, Thomas E. Simmons

Theses and Dissertations

In this thesis, a methodology is developed to experimentally test and evaluate a programmable logic device unde r gamma irradiation. The purpose of which is to determine the radiation effects and characterize the improvements of various hardening by design techniques. The techniques analyzed in this thesis include Error Correction Coding (ECC) and Triple Modular Redundancy (TMR). The TMR circuit includes three different functional implementations of adders compared to TMR voted circuits of those same adders. The TMR is implemented with the same functional adders and as a Functional TMR (FTMR) with three different function adders that are voted on. The …