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Electrical and Electronics

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Air Force Institute of Technology

Gate array circuits

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Full-Text Articles in Engineering

Characterization Of Hardening By Design Techniques On Commercial, Small Feature Sized Field-Programmable Gate Arrays, Thomas E. Simmons Mar 2009

Characterization Of Hardening By Design Techniques On Commercial, Small Feature Sized Field-Programmable Gate Arrays, Thomas E. Simmons

Theses and Dissertations

In this thesis, a methodology is developed to experimentally test and evaluate a programmable logic device unde r gamma irradiation. The purpose of which is to determine the radiation effects and characterize the improvements of various hardening by design techniques. The techniques analyzed in this thesis include Error Correction Coding (ECC) and Triple Modular Redundancy (TMR). The TMR circuit includes three different functional implementations of adders compared to TMR voted circuits of those same adders. The TMR is implemented with the same functional adders and as a Functional TMR (FTMR) with three different function adders that are voted on. The …


Limitations Of A True Random Number Generator In A Field Programmable Gate Array, Jennifer L. Brady Dec 2008

Limitations Of A True Random Number Generator In A Field Programmable Gate Array, Jennifer L. Brady

Theses and Dissertations

Random number generators are used in many areas of engineering, computer science, most notably in simulations and cryptographic applications. There are true random number generators (TRNG) and pseudo random number generators (PRNG). Only a true random number generator is secure because the output bits are non-repeating and nonreproducible. As society has become more dependent on electronic technology the need for true random number generators has increased due to processes that require encryption in everyday use. A fast true random number generator on a field programmable gate array presents digital designers with the ability to have the generator on chip. Since …


Anti-Tamper Method For Field Programmable Gate Arrays Through Dynamic Reconfiguration And Decoy Circuits, Samuel J. Stone Mar 2008

Anti-Tamper Method For Field Programmable Gate Arrays Through Dynamic Reconfiguration And Decoy Circuits, Samuel J. Stone

Theses and Dissertations

As Field Programmable Gate Arrays (FPGAs) become more widely used, security concerns have been raised regarding FPGA use for cryptographic, sensitive, or proprietary data. Storing or implementing proprietary code and designs on FPGAs could result in the compromise of sensitive information if the FPGA device was physically relinquished or remotely accessible to adversaries seeking to obtain the information. Although multiple defensive measures have been implemented (and overcome), the possibility exists to create a secure design through the implementation of polymorphic Dynamically Reconfigurable FPGA (DRFPGA) circuits. Using polymorphic DRFPGAs removes the static attributes from their design; thus, substantially increasing the difficulty …


Characterization And Implementation Of A Real-World Target Tracking Algorithm On Field Programmable Gate Arrays With Kalman Filter Test Case, Benjamin D. Hancey Mar 2008

Characterization And Implementation Of A Real-World Target Tracking Algorithm On Field Programmable Gate Arrays With Kalman Filter Test Case, Benjamin D. Hancey

Theses and Dissertations

A one dimensional Kalman Filter algorithm provided in Matlab is used as the basis for a Very High Speed Integrated Circuit Hardware Description Language (VHDL) model. The JAVA programming language is used to create the VHDL code that describes the Kalman filter in hardware which allows for maximum flexibility. A one-dimensional behavioral model of the Kalman Filter is described, as well as a one-dimensional and synthesizable register transfer level (RTL) model with optimizations for speed, area, and power. These optimizations are achieved by a focus on parallelization as well as careful Kalman filter sub-module algorithm selection. Newton-Raphson reciprocal is the …