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A Graph-Based Approach To Symbolic Functional Decomposition Of Finite State Machines, Piotr Szotkowski, Mariusz Rawski, Henry Selvaraj
A Graph-Based Approach To Symbolic Functional Decomposition Of Finite State Machines, Piotr Szotkowski, Mariusz Rawski, Henry Selvaraj
Electrical & Computer Engineering Faculty Research
This paper discusses the symbolic functional decomposition method for implementing finite state machines in field-programmable gate array devices. This method is a viable alternative to the presently widespread two-step approaches to the problem, which consist of separate encoding and mapping stages; the proposed method does not have a separate decomposition step instead, the state's final encoding is introduced gradually on every decomposition iteration. Along with general description of the functional symbolic decomposition method's steps, the paper discusses various algorithms implementing the method and presents an example realisation of the most interesting algorithm. In the end, the paper compares the results …
Characterization Of Hardening By Design Techniques On Commercial, Small Feature Sized Field-Programmable Gate Arrays, Thomas E. Simmons
Characterization Of Hardening By Design Techniques On Commercial, Small Feature Sized Field-Programmable Gate Arrays, Thomas E. Simmons
Theses and Dissertations
In this thesis, a methodology is developed to experimentally test and evaluate a programmable logic device unde r gamma irradiation. The purpose of which is to determine the radiation effects and characterize the improvements of various hardening by design techniques. The techniques analyzed in this thesis include Error Correction Coding (ECC) and Triple Modular Redundancy (TMR). The TMR circuit includes three different functional implementations of adders compared to TMR voted circuits of those same adders. The TMR is implemented with the same functional adders and as a Functional TMR (FTMR) with three different function adders that are voted on. The …