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Computer and Systems Architecture

2013

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Articles 1 - 23 of 23

Full-Text Articles in Physical Sciences and Mathematics

Using Software-Based Decision Procedures To Control Instruction-Level Execution, William B. Kimball Dec 2013

Using Software-Based Decision Procedures To Control Instruction-Level Execution, William B. Kimball

AFIT Patents

An apparatus, method and program product are provided for securing a computer system. A digital signature of an application is checked, which is loaded into a memory of the computer system configured to contain memory pages. In response to finding a valid digital signature, memory pages containing instructions of the application are set as executable and memory pages other than those containing instructions of the application are set as non-executable. Instructions in executable memory pages are executed. Instructions in non-executable memory pages are prevented from being executed. A page fault is generated in response to an attempt to execute an …


On The Interoperability Of Programming Languages Based On The Fork-Join Parallelism Model, Sushek Shekar Dec 2013

On The Interoperability Of Programming Languages Based On The Fork-Join Parallelism Model, Sushek Shekar

Electronic Thesis and Dissertation Repository

This thesis describes the implementation of MetaFork, a meta-language for concurrency platforms targeting multicore architectures. First of all, MetaFork is a multithreaded language based on the fork-join model of concurrency: it allows the programmer to express parallel algorithms assuming that tasks are dynamically scheduled at run-time. While MetaFork makes no assumption about the run-time system, it formally defines the serial C-elision of a MetaFork program. In addition, MetaFork is a suite of source-to-source compilers permitting the automatic translation of multithreaded programs between programming languages based on the fork-join model. Currently, this compilation framework supports the OpenMP and CilkPlus concurrency platforms. …


On High-Performance Parallel Fixed-Point Decimal Multiplier Designs, Ming Zhu Dec 2013

On High-Performance Parallel Fixed-Point Decimal Multiplier Designs, Ming Zhu

UNLV Theses, Dissertations, Professional Papers, and Capstones

High-performance, area-efficient hardware implementation of decimal multiplication is preferred to slow software simulations in a number of key scientific and financial application areas, where errors caused by converting decimal numbers into their approximate binary representations are not acceptable.

Multi-digit parallel decimal multipliers involve two major stages: (i) the partial product generation (PPG) stage, where decimal partial products are determined by selecting the right versions of the pre-computed multiples of the multiplicand, followed by (ii) the partial product accumulation (PPA) stage, where all the partial products are shifted and then added together to obtain the final multiplication product. In this thesis, …


Adaptive Computer‐Generated Forces For Simulator‐Based Training, Expert Systems With Applications, Teck-Hou Teng, Ah-Hwee Tan, Loo-Nin Teow Dec 2013

Adaptive Computer‐Generated Forces For Simulator‐Based Training, Expert Systems With Applications, Teck-Hou Teng, Ah-Hwee Tan, Loo-Nin Teow

Research Collection School Of Computing and Information Systems

Simulator-based training is in constant pursuit of increasing level of realism. The transition from doctrine-driven computer-generated forces (CGF) to adaptive CGF represents one such effort. The use of doctrine-driven CGF is fraught with challenges such as modeling of complex expert knowledge and adapting to the trainees’ progress in real time. Therefore, this paper reports on how the use of adaptive CGF can overcome these challenges. Using a self-organizing neural network to implement the adaptive CGF, air combat maneuvering strategies are learned incrementally and generalized in real time. The state space and action space are extracted from the same hierarchical doctrine …


An Experimental Study For Inter-User Interference Mitigation In Wireless Body Sensor Networks, Bin Cao, Yu Ge, Chee Wee Kim, Gang Feng, Hwee-Pink Tan, Yun Li Oct 2013

An Experimental Study For Inter-User Interference Mitigation In Wireless Body Sensor Networks, Bin Cao, Yu Ge, Chee Wee Kim, Gang Feng, Hwee-Pink Tan, Yun Li

Research Collection School Of Computing and Information Systems

Inter-user interference degrades the reliability of data delivery in wireless body sensor networks (WBSNs) in dense deployments when multiple users wearing WBSNs are in close proximity to one another. The impact of such interference in realistic WBSN systems is significant but is not well explored. To this end, we investigate and analyze the impact of inter-user interference on packet delivery ratio (PDR) and throughput. We conduct extensive experiments based on the TelosB WBSN platform, considering unslotted carrier sense multiple access (CSMA) with collision avoidance (CA) and slotted CSMA/CA modes in IEEE 802.15.4 MAC, respectively. In order to mitigate interuser interference, …


Clustering Algorithms For Maximizing The Lifetime Of Wireless Sensor Networks With Energy-Harvesting Sensors, Pengfei Zhang, Gaoxi Xiao, Hwee-Pink Tan Oct 2013

Clustering Algorithms For Maximizing The Lifetime Of Wireless Sensor Networks With Energy-Harvesting Sensors, Pengfei Zhang, Gaoxi Xiao, Hwee-Pink Tan

Research Collection School Of Computing and Information Systems

Motivated by recent developments in wireless sensor networks (WSNs), we present several efficient clustering algorithms for maximizing the lifetime of WSNs, i.e., the duration till a certain percentage of the nodes die. Specifically, an optimization algorithm is proposed for maximizing the lifetime of a single-cluster network, followed by an extension to handle multi-cluster networks. Then we study the joint problem of prolonging network lifetime by introducing energy-harvesting (EH) nodes. An algorithm is proposed for maximizing the network lifetime where EH nodes serve as dedicated relay nodes for cluster heads (CHs). Theoretical analysis and extensive simulation results show that the proposed …


Rapport: Semantic-Sensitive Namespace Management In Large-Scale File Systems, Yu Hua, Hong Jiang, Yifeng Zhu, Dan Feng Sep 2013

Rapport: Semantic-Sensitive Namespace Management In Large-Scale File Systems, Yu Hua, Hong Jiang, Yifeng Zhu, Dan Feng

Yifeng Zhu

Explosive growth in volume and complexity of data exacerbates the key challenge to effectively and efficiently manage data in a way that fundamentally improves the ease and efficacy of their use. Existing large-scale file systems rely on hierarchically structured namespace that leads to severe performance bottlenecks and renders it impossible to support real-time queries on multi-dimensional attributes. This paper proposes a novel semantic-sensitive scheme, called Rapport, to provide dynamic and adaptive namespace management and support complex queries. The basic idea is to build files’ namespace by utilizing their semantic correlation and exploiting dynamic evolution of attributes to support namespace management. …


Collaborative Policy-Based Autonomic Management In Iaas Clouds, Omid Mola Sep 2013

Collaborative Policy-Based Autonomic Management In Iaas Clouds, Omid Mola

Electronic Thesis and Dissertation Repository

With the increasing number of "machines" (either virtual or physical) in a computing environment, it is becoming harder to monitor and manage these resources. Relying on human administrators, even with tools, is expensive and the growing complexity makes management even harder. The alternative is to look for automated approaches that can monitor and manage computing resources in real time with no human intervention. One of the approaches to this problem is policy-based autonomic management. However, in large systems having one single autonomic manager to manage everything is almost impossible. Therefore, multiple autonomic managers will be needed and these will need …


Evaluating The Presence Of A Victim Cache On An Arm Processor, Lakshmi Vidya Peri Sep 2013

Evaluating The Presence Of A Victim Cache On An Arm Processor, Lakshmi Vidya Peri

Computer Science Graduate Projects and Theses

Mobile processor is a CPU designed to save power. It is found in mobile computers and cell phones. A CPU chip, designed for portable computers, is typically housed in a smaller chip package, but more importantly, in order to run cooler, it uses lower voltages than its desktop counterpart and has more "sleep mode" capability. A mobile processor can be throttled down to different power levels and/or sections of the chip can be turned off entirely when not in use. ARM is a 32-bit reduced instruction set computer (RISC) instruction set architecture (ISA). The relative simplicity of ARM processors makes …


High-Performance, Scalable Optical Network-On-Chip Architectures, Xianfang Tan Aug 2013

High-Performance, Scalable Optical Network-On-Chip Architectures, Xianfang Tan

UNLV Theses, Dissertations, Professional Papers, and Capstones

The rapid advance of technology enables a large number of processing cores to be integrated into a single chip which is called a Chip Multiprocessor (CMP) or a Multiprocessor System-on-Chip (MPSoC) design. The on-chip interconnection network, which is the communication infrastructure for these processing cores, plays a central role in a many-core system. With the continuously increasing complexity of many-core systems, traditional metallic wired electronic networks-on-chip (NoC) became a bottleneck because of the unbearable latency in data transmission and extremely high energy consumption on chip. Optical networks-on-chip (ONoC) has been proposed as a promising alternative paradigm for electronic NoC with …


Optimizing Parallel Belief Propagation In Junction Trees Using Regression, Lu Zheng, Ole J. Mengshoel Jul 2013

Optimizing Parallel Belief Propagation In Junction Trees Using Regression, Lu Zheng, Ole J. Mengshoel

Ole J Mengshoel

The junction tree approach, with applications in artificial intelligence, computer vision, machine learning, and statistics, is often used for computing posterior distributions in probabilistic graphical models. One of the key challenges associated with junction trees is computational, and several parallel computing technologies - including many-core processors - have been investigated to meet this challenge. Many-core processors (including GPUs) are now programmable, unfortunately their complexities make it hard to manually tune their parameters in order to optimize software performance. In this paper, we investigate a machine learning approach to minimize the execution time of parallel junction tree algorithms implemented on a …


Exploring Multiple Dimensions Of Parallelism In Junction Tree Message Passing, Lu Zheng, Ole J. Mengshoel Jun 2013

Exploring Multiple Dimensions Of Parallelism In Junction Tree Message Passing, Lu Zheng, Ole J. Mengshoel

Ole J Mengshoel

Belief propagation over junction trees is known to be computationally challenging in the general case. One way of addressing this computational challenge is to use node-level parallel computing, and parallelize the computation associated with each separator potential table cell. However, this approach is not efficient for junction trees that mainly contain small separators. In this paper, we analyze this problem, and address it by studying a new dimension of node-level parallelism, namely arithmetic parallelism. In addition, on the graph level, we use a clique merging technique to further adapt junction trees to parallel computing platforms. We apply our parallel approach …


Mobile Computing: Challenges And Opportunities For Autonomy And Feedback, Ole J. Mengshoel, Bob Iannucci, Abe Ishihara May 2013

Mobile Computing: Challenges And Opportunities For Autonomy And Feedback, Ole J. Mengshoel, Bob Iannucci, Abe Ishihara

Ole J Mengshoel

Mobile devices have evolved to become computing platforms more similar to desktops and workstations than the cell phones and handsets of yesteryear. Unfortunately, today’s mobile infrastructures are mirrors of the wired past. Devices, apps, and networks impact one another, but a systematic approach for allowing them to cooperate is currently missing. We propose an approach that seeks to open key interfaces and to apply feedback and autonomic computing to improve both user experience and mobile system dynamics.


Programming Dense Linear Algebra Kernels On Vectorized Architectures, Jonathan Lawrence Peyton May 2013

Programming Dense Linear Algebra Kernels On Vectorized Architectures, Jonathan Lawrence Peyton

Masters Theses

The high performance computing (HPC) community is obsessed over the general matrix-matrix multiply (GEMM) routine. This obsession is not without reason. Most, if not all, Level 3 Basic Linear Algebra Subroutines (BLAS) can be written in terms of GEMM, and many of the higher level linear algebra solvers' (i.e., LU, Cholesky) performance depend on GEMM's performance. Getting high performance on GEMM is highly architecture dependent, and so for each new architecture that comes out, GEMM has to be programmed and tested to achieve maximal performance. Also, with emergent computer architectures featuring more vector-based and multi to many-core processors, GEMM performance …


Improving The Performance Of The Parallel Ice Sheet Model On A Large-Scale, Distributed Supercomputer, Timothy J. Morey May 2013

Improving The Performance Of The Parallel Ice Sheet Model On A Large-Scale, Distributed Supercomputer, Timothy J. Morey

Electronic Theses and Dissertations

In this thesis, we describe our work to understand and improve the performance and scalability of the Parallel Ice Sheet Model (PISM) on the Ranger supercomputer. PISM enables the simulation of large-scale ice sheets, such as those found in Greenland and Antarctica, which are of particular interest to climate scientists due to their potential to contribute to sea-level rise.

PISM has a unique parallel architecture that is designed to take advantage of the computational resources available on state-of-the-art supercomputers. The problem, however, is that even though PISM can run without modifcation on a supercomputer, it is generally unable to do …


Energy-Neutral Scheduling And Forwarding In Environmentally-Powered Wireless Sensor Networks, Alvin Cerdena Valera, Weng Seng Soh, Hwee-Pink Tan May 2013

Energy-Neutral Scheduling And Forwarding In Environmentally-Powered Wireless Sensor Networks, Alvin Cerdena Valera, Weng Seng Soh, Hwee-Pink Tan

Research Collection School Of Computing and Information Systems

In environmentally-powered wireless sensor networks (EPWSNs), low latency wakeup scheduling and packet forwarding is challenging due to dynamic duty cycling, posing time-varying sleep latencies and necessitating the use of dynamic wakeup schedules. We show that the variance of the intervals between receiving wakeup slots affects the expected sleep latency: when the variance of the intervals is low (high), the expected latency is low (high). We therefore propose a novel scheduling scheme that uses the bit-reversal permutation sequence (BRPS) – a finite integer sequence that positions receiving wakeup slots as evenly as possible to reduce the expected sleep latency. At the …


Wireless Transmission Network : A Imagine, Radhey Shyam Meena Engineer, Neeraj Kumar Garg Asst.Prof Apr 2013

Wireless Transmission Network : A Imagine, Radhey Shyam Meena Engineer, Neeraj Kumar Garg Asst.Prof

Radhey Shyam Meena

World cannot be imagined without electrical power. Generally the power is transmitted through transmission networks. This paper describes an original idea to eradicate the hazardous usage of electrical wires which involve lot of confusion in particularly organizing them. Imagine a future in which wireless power transfer is feasible: cell phones, household robots, mp3 players, laptop computers and other portable electronic devices capable of charging themselves without ever being plugged in freeing us from that final ubiquitous power wire. This paper includes the techniques of transmitting power without using wires with an efficiency of about 95% with non-radioactivemethods. In this paper …


On High-Performance Parallel Decimal Fixed-Point Multiplier Designs, Ming Zhu Apr 2013

On High-Performance Parallel Decimal Fixed-Point Multiplier Designs, Ming Zhu

College of Engineering: Graduate Celebration Programs

Decimal computations are required in finance, and etc.

  • Precise representation for decimals (E.g. 0.2, 0.7… )
  • Performance Requirements (Software simulations are very slow)


Battery Energy Storage System In Solar Power Generation, Radhey Shyam Meena Er., Deepa Sharma Mar 2013

Battery Energy Storage System In Solar Power Generation, Radhey Shyam Meena Er., Deepa Sharma

Radhey Shyam Meena

Grid-connected solar PV dramatically changes the load profile of an electric utility customer. The expected widespread adoption of solar generation by customers on the distribution system poses significant challenges to system operators both in transient and steady state operation, from issues including voltage swings, sudden weather-induced changes in generation, and legacy protective devices designed with one-way power flow in mind


Cfp: Handbook Of Research On Technological Applications And Innovation For Economic Development, Deogratias Harorimana Mr Mar 2013

Cfp: Handbook Of Research On Technological Applications And Innovation For Economic Development, Deogratias Harorimana Mr

Dr Deogratias Harorimana

The innovation in the 21st century goes significantly beyond the high-tech picture driven by small or large industry clusters in a specific region-typically Silicon Valley and M4Corridor. The future of innovation will lie within knowledge management and seamless technological applications. These will be supported by planned funding strategies, possibly with clients as drivers of the innovation. This view seems to be supported by the UK government “Technology and Innovation Futures” (2011); the USA government (2011), study into which leading scholars concede that the future innovation and technological applications for economic growth will include products and processes, improvements in areas such …


Describing Radio Hardware And Software Using Owl For Over-The-Air Software Download, Todor Cooklev, Stanchev, David Clendenen Feb 2013

Describing Radio Hardware And Software Using Owl For Over-The-Air Software Download, Todor Cooklev, Stanchev, David Clendenen

Todor Cooklev

Recently, several researchers have discovered the need for radios to use description techniques. Previous research describes information such as the current frequency band, waveform, and so on. However, this information is presented at a level that is not sufficient to determine software/hardware compatibility for over-the-air software download. For example, a device should not attempt to download a wideband waveform if its radio front-end is only narrowband, or if its baseband hardware cannot provide the required MIPS for the new waveform. Over-the-air software download is one of the most interesting features of software-defined radios. The compatibility between software and hardware prior …


Battery Energy Storage System In Solar Power Generation, Radhey Shyam Meena Er. Jan 2013

Battery Energy Storage System In Solar Power Generation, Radhey Shyam Meena Er.

Radhey Shyam Meena

As solar photovoltaic power generation becomes more commonplace, the inherent intermittency of the solar resource poses one of the great challenges to those who would design and implement the next generation smart grid. Specifically, grid-tied solar power generation is a distributed resource whose output can change extremely rapidly, resulting in many issues for the distribution system operator with a large quantity of installed photovoltaic devices. Battery energy storage systems are increasingly being used to help integrate solar power into the grid. These systems are capable of absorbing and delivering both real and reactive power with sub-second response times. With these …


Accelerated Data Delivery Architecture, Michael L. Grecol Jan 2013

Accelerated Data Delivery Architecture, Michael L. Grecol

Electronic Theses and Dissertations

This paper introduces the Accelerated Data Delivery Architecture (ADDA). ADDA establishes a framework to distribute transactional data and control consistency to achieve fast access to data, distributed scalability and non-blocking concurrency control by using a clean declarative interface. It is designed to be used with web-based business applications. This framework uses a combination of traditional Relational Database Management System (RDBMS) combined with a distributed Not Only SQL (NoSQL) database and a browser-based database. It uses a single physical and conceptual database schema designed for a standard RDBMS driven application. The design allows the architect to assign consistency levels to entities …