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Articles 1 - 30 of 32
Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems
Efficient Hardware Architectures For Public-Key Cryptosystems, Mohammadamin Saburruhmonfared
Efficient Hardware Architectures For Public-Key Cryptosystems, Mohammadamin Saburruhmonfared
Electronic Thesis and Dissertation Repository
Finite field arithmetic plays an essential role in public-key cryptography as all the underlying operations are performed in these fields. The finite fields are either prime fields or binary fields. Binary field elements can mainly be represented on a polynomial basis or a normal basis (NB). NB representation offers a simple squaring operation, especially in hardware. However, multiplication is typically complex, and a particular subset of NB called Gaussian Normal Basis (GNB) features an efficient multiplication operation used in this work. The first part of this thesis has focused on improving finite field arithmetic architectures over GNB. Among different arithmetic …
Longitudinal Partitioning Waveform Relaxation Methods For The Analysis Of Transmission Line Circuits, Tarik Menkad
Longitudinal Partitioning Waveform Relaxation Methods For The Analysis Of Transmission Line Circuits, Tarik Menkad
Electronic Thesis and Dissertation Repository
Three research projects are presented in this manuscript. Projects one and two describe two waveform relaxation algorithms (WR) with longitudinal partitioning for the time-domain analysis of transmission line circuits. Project three presents theoretical results about the convergence of WR for chains of general circuits.
The first WR algorithm uses a assignment-partition procedure that relies on inserting external series combinations of positive and negative resistances into the circuit to control the speed of convergence of the algorithm. The convergence of the subsequent WR method is examined, and fast convergence is cast as a generic optimization problem in the frequency-domain. An automatic …
Design And Implementation Of An Isfet Sensor With Integration Of An On-Chip Processor, Shaghayegh Aslanzadeh
Design And Implementation Of An Isfet Sensor With Integration Of An On-Chip Processor, Shaghayegh Aslanzadeh
Doctoral Dissertations
Portable sensors are used in many applications. Among them, pH sensors are suitable for quantifying and identifying various analytes in real-time and doing so non-invasively. The analytes may have environmental impact such as in water quality monitoring. The analytes may also have biological impact such as monitoring cell culture or remote patient health assessment. CMOS based sensors are compact and enable low power consumption suitable for these portable applications.
This work reports on the development of a portable CMOS based pH sensor. The contributions of this dissertation are as follows. First, a differential pH sensor, with two different sized electrodes …
Fractional Order Identification Method And Control: Development Of Control For Non-Minimum Phase Fractional Order System, Majid Abdullah Alhomim
Fractional Order Identification Method And Control: Development Of Control For Non-Minimum Phase Fractional Order System, Majid Abdullah Alhomim
Graduate Theses and Dissertations
The increasing use of renewable energy has resulted in the need for improved a dc-dc converters. This type of electronic-based equipment is needed to interface the dc voltages normally encountered with solar arrays and battery systems to voltage levels suitable for connecting three phase inverters to distribution level networks. As grid-connected solar power levels continue to increase, there is a corresponding need for improved modeling and control of power electronic converters. In particular, higher levels of boost ratios are needed to connect low voltage circuits (less than 1000 V) to medium voltage levels in the range of 13 kV to …
Performance Evaluation, Comparison And Improvement Of The Hardware Implementations Of The Advanced Encryption Standard S-Box, Doaa Ashmawy
Performance Evaluation, Comparison And Improvement Of The Hardware Implementations Of The Advanced Encryption Standard S-Box, Doaa Ashmawy
Electronic Thesis and Dissertation Repository
The Advanced Encryption Standard (AES) is the most popular algorithm used in symmetric key cryptography. The efficient computation of AES is essential for many computing platforms. The S-box is the only nonlinear transformation step of the AES algorithm. Efficient implementation of the AES S-box is very crucial for AES hardware. The AES S-box could be implemented by using look-up table method or by using finite field arithmetic. The finite field arithmetic design approach to implement the AES S-box is superior in saving the hardware resources. The main objective of this thesis is to evaluate, compare and improve the hardware implementations …
A 2.56 Gbps Serial Wireline Transceiver That Supports An Auxiliary Channel And A Hybrid Line Driver To Compensate Large Channel Loss, Xiaoran Wang
Electrical Engineering Theses and Dissertations
Serial transceiver links are widely used for high-speed point-to-point communications. This dissertation describes two transceiver link designs for two different applications.
In serial wireline communications, security is an increasingly important factor to concern. Securing an information processing system at the application and system software layers is regarded as a necessary but incomplete defense against the cyber security threats. In this dissertation, an asynchronous serial transceiver that is capable of transmitting and receiving an auxiliary data stream concurrently with the primary data stream is described. The transceiver instantiates the auxiliary data stream by modulating the phase of the primary data without …
Investigating Single Precision Floating General Matrix Multiply In Heterogeneous Hardware, Steven Harris
Investigating Single Precision Floating General Matrix Multiply In Heterogeneous Hardware, Steven Harris
McKelvey School of Engineering Theses & Dissertations
The fundamental operation of matrix multiplication is ubiquitous across a myriad of disciplines. Yet, the identification of new optimizations for matrix multiplication remains relevant for emerging hardware architectures and heterogeneous systems. Frameworks such as OpenCL enable computation orchestration on existing systems, and its availability using the Intel High Level Synthesis compiler allows users to architect new designs for reconfigurable hardware using C/C++. Using the HARPv2 as a vehicle for exploration, we investigate the utility of several of the most notable matrix multiplication optimizations to better understand the performance portability of OpenCL and the implications for such optimizations on this and …
Data Processing Electronics For An Ultra-Fast Single-Photon Counting Camera, Jackson Hyde
Data Processing Electronics For An Ultra-Fast Single-Photon Counting Camera, Jackson Hyde
McKelvey School of Engineering Theses & Dissertations
Localizing photon arrivals with high spatial (megapixel) and temporal (sub-nanosecond) resolution would be transformative for a number of applications, including single-molecule super-resolution fluorescence microscopy. Here, the Data Processing Field Programmable Gate Array (FPGA) is developed as an ultra-fast computational platform built on an FPGA for a microchannel plate (MCP)-photomultiplier tube (PMT) based single-photon counting camera. Each photon is converted by the MCP-PMT into an electron cloud that generates current pulses across a 50×50 cross-strip anode. The Data Processing FPGA executes a massively parallel center-of-gravity coordinate determination algorithm on the digitized current pulses to determine a 2D position and time of …
Formal Verification Of Divider And Square-Root Arithmetic Circuits Using Computer Algebra Methods, Atif Yasin
Formal Verification Of Divider And Square-Root Arithmetic Circuits Using Computer Algebra Methods, Atif Yasin
Doctoral Dissertations
A considerable progress has been made in recent years in verification of arithmetic circuits such as multipliers, fused multiply-adders, multiply-accumulate, and other components of arithmetic datapaths, both in integer and finite field domain. However, the verification of hardware dividers and square-root functions have received only a limited attention from the verification community, with a notable exception for theorem provers and other inductive, non-automated systems. Division, square root, and transcendental functions are all tied to the basic Intel architecture and proving correctness of such algorithms is of grave importance. Although belonging to the same iterative-subtract class of architectures, they widely differ …
Compound Effects Of Clock And Voltage Based Power Side-Channel Countermeasures, Jacqueline Lagasse
Compound Effects Of Clock And Voltage Based Power Side-Channel Countermeasures, Jacqueline Lagasse
Masters Theses
The power side-channel attack, which allows an attacker to derive secret information from power traces, continues to be a major vulnerability in many critical systems. Numerous countermeasures have been proposed since its discovery as a serious vulnerability, including both hardware and software implementations. Each countermeasure has its own drawback, with some of the highly effective countermeasures incurring large overhead in area and power. In addition, many countermeasures are quite invasive to the design process, requiring modification of the design and therefore additional validation and testing to ensure its accuracy. Less invasive countermeasures that do not require directly modifying the system …
Device-Level Predictive Modeling Of Extreme Electromagnetic Interference, Nishchay H. Sule
Device-Level Predictive Modeling Of Extreme Electromagnetic Interference, Nishchay H. Sule
Electrical and Computer Engineering ETDs
Radio Frequency (RF) interference is a prominent issue for modern electronic devices. As device size and supply power shrink to meet the on-going demand for compact and complex Integrated Circuits (ICs), their susceptibility to external noise coupling to the input or power supply increases significantly. One such type of noise that acts upon a system to be considered is Extreme Electromagnetic Interference (EEMI). Previous works done to understand and evaluate the impact of EEMI onto a system or sub-system have been conducted on a statistical or empirical analysis level, which has led to complex and convoluted analysis, that requires significant …
Design Of Control System With Feedback Loop For A Pulsatile Pump, Ian Scott Sanders
Design Of Control System With Feedback Loop For A Pulsatile Pump, Ian Scott Sanders
Graduate Theses and Dissertations
This paper describes the design and implementation of a closed-loop proportional, integral, differential (PID) control system for a custom in-house pulsatile pump apparatus for the University of Arkansas Biomedical Department. The control system is designed to control a MOONS’ PL34HD0L8500 hybrid stepper motor using a dual H-bridge motor driver network with four pulse-width modulated (PWM) inputs to drive a pulsatile pump apparatus at motor stepping frequencies up to 2kHz. The speed of the motor is controlled from a pressure profile transmitted from an external source over RS-232 communication that specifies the motor speed, number of datapoints, and an array of …
Polyone Smartphone, Joshua Zalmanowitz, Chi Nguyen, Gerome Cacho, Chris Lim
Polyone Smartphone, Joshua Zalmanowitz, Chi Nguyen, Gerome Cacho, Chris Lim
Electrical Engineering
The Poly One Smartphone is a student designed smartphone built to explore the implementation of 5G, provide a hardware solution to ensure personal information security and privacy, and provide longer battery life. The key features of this smartphone include but are not limited to a main cpu, some form of network connectivity in the form of Wi-fi or Cellular Data, calling functionality, a rechargeable battery that works with common power connection protocols, and compatibility with popular applications.
Investigations Of New Fault-Tolerant Methods For Multilevel Inverters, Haider Mhiesan
Investigations Of New Fault-Tolerant Methods For Multilevel Inverters, Haider Mhiesan
Graduate Theses and Dissertations
The demands of power electronics with high power capability have increased in the last decades. These needs have driven the expansion of existing power electronics topologies and developing new power electronics generations. Multilevel inverters (MLI) are one of the most promising power electronics circuits that have been implemented and commercialized in high-voltage direct current (HVDC), motor drives, and battery energy storage systems (BESS). The expanding uses of the MLI have lead to creation of new topologies for different applications. However, one of the disadvantages of using MLIs is their complexity. MLIs consist of a large number of switching devices, which …
Secure Network-On-Chip Against Black Hole And Tampering Attacks, Luka Daoud
Secure Network-On-Chip Against Black Hole And Tampering Attacks, Luka Daoud
Boise State University Theses and Dissertations
The Network-on-Chip (NoC) has become the communication heart of Multiprocessors-System-on-Chip (MPSoC). Therefore, it has been subject to a plethora of security threats to degrade the system performance or steal sensitive information. Due to the globalization of the modern semiconductor industry, many different parties take part in the hardware design of the system. As a result, the NoC could be infected with a malicious circuit, known as a Hardware Trojan (HT), to leave a back door for security breach purposes. HTs are smartly designed to be too small to be uncovered by offline circuit-level testing, so the system requires an online …
Built-In Self-Test (Bist) For Multi-Threshold Null Convention Logic (Mtncl) Circuits, Brett Sparkman
Built-In Self-Test (Bist) For Multi-Threshold Null Convention Logic (Mtncl) Circuits, Brett Sparkman
Graduate Theses and Dissertations
This dissertation proposes a Built-In Self-Test (BIST) hardware implementation for Multi-Threshold NULL Convention Logic (MTNCL) circuits. Two different methods are proposed: an area-optimized topology that requires minimal area overhead, and a test-performance-optimized topology that utilizes parallelism and internal hardware to reduce the overall test time through additional controllability points. Furthermore, an automated software flow is proposed to insert, simulate, and analyze an input MTNCL netlist to obtain a desired fault coverage, if possible, through iterative digital and fault simulations. The proposed automated flow is capable of producing both area-optimized and test-performance-optimized BIST circuits and scripts for digital and fault simulation …
Area Efficient Device Optimization For Esd Protection In High Speed Interface Ics, Dan Thomas Jarard
Area Efficient Device Optimization For Esd Protection In High Speed Interface Ics, Dan Thomas Jarard
Graduate Theses and Dissertations
Electrostatic discharge (ESD) protection is considered as a vital step in integrated circuit (IC) manufacturing process. IC chips are unable to overcome the effects of transient events without adequate discharge protection. Recent trend in the industry has seen the incorporation of system level ESD protection within the IC chip. Incorporating system level on-chip ESD protection often increases cost, degrades circuit performance and consumes layout area which could otherwise be used for improving the circuit performance. These design challenges could be easily overcome if the parasitic components in a circuit were used for ESD protection. Despite the various design challenges, on-chip …
Sunseeker Display And Driver Controller, Alec Kwapis
Sunseeker Display And Driver Controller, Alec Kwapis
Honors Theses
Digital dashboard displays with critical driver information are found in all modern vehicles. Examples of such information available to the driver include a speedometer, odometer, engine RPM, fuel gauge and more. The current 2016 Sunseeker solar car already has numerous displays that can show critical information to the driver, however, there are several problems that exist. Each display itself is less than two inches in size, the text on the screens is difficult to read, and the measurements have no units. Furthermore, these displays were made by a company that no longer exists, thus preventing the solar car team from …
Heuristic-Based Threat Analysis Of Register-Transfer-Level Hardware Designs, Wesley Layton Ellington
Heuristic-Based Threat Analysis Of Register-Transfer-Level Hardware Designs, Wesley Layton Ellington
Electrical Engineering Theses and Dissertations
The development of globalized semiconductor manufacturing processes and supply chains has lead to an increased interest in hardware security as new types of hardware based attacks, called hardware Trojans, are being observed in industrial and military electronics. To combat this, a technique was developed to help analyze hardware designs at the register-transfer-level (RTL) and locate points of interest within a design that might be vulnerable to attack. This method aims to eventually enable the creation of an end-to-end design hardening solution that analyzes existing designs and suggests countermeasures for potential Trojan attacks. The method presented in this work uses a …
Analysis And Verification Of Arithmetic Circuits Using Computer Algebra Approach, Tiankai Su
Analysis And Verification Of Arithmetic Circuits Using Computer Algebra Approach, Tiankai Su
Doctoral Dissertations
Despite a considerable progress in verification of random and control logic, advances in formal verification of arithmetic designs have been lagging. This can be attributed mostly to the difficulty of efficient modeling of arithmetic circuits and data paths without resorting to computationally expensive Boolean methods, such as Binary Decision Diagrams (BDDs) and Boolean Satisfiability (SAT) that require ``bit blasting'', i.e., flattening the design to a bit-level netlist. Similarly, approaches that rely on computer algebra and Satisfiability Modulo Theories (SMT) methods are either too abstract to handle the bit-level complexity of arithmetic designs or require solving computationally expensive decision or satisfiability …
Trustworthy Systems And Protocols For The Internet Of Things, Arman Pouraghily
Trustworthy Systems And Protocols For The Internet Of Things, Arman Pouraghily
Doctoral Dissertations
Processor-based embedded systems are integrated into many aspects of everyday life such as industrial control, automotive systems, healthcare, the Internet of Things, etc. As Moore’s law progresses, these embedded systems have moved from simple microcontrollers to full-scale embedded computing systems with multiple processor cores and operating systems support. At the same time, the security of these devices has also become a key concern. Our main focus in this work is the security and privacy of the embedded systems used in IoT systems. In the first part of this work, we take a look at the security of embedded systems from …
Design Of Hardware With Quantifiable Security Against Reverse Engineering, Shahrzad Keshavarz
Design Of Hardware With Quantifiable Security Against Reverse Engineering, Shahrzad Keshavarz
Doctoral Dissertations
Semiconductors are a 412 billion dollar industry and integrated circuits take on important roles in human life, from everyday use in smart-devices to critical applications like healthcare and aviation. Saving today's hardware systems from attackers can be a huge concern considering the budget spent on designing these chips and the sensitive information they may contain. In particular, after fabrication, the chip can be subject to a malicious reverse engineer that tries to invasively figure out the function of the chip or other sensitive data. Subsequent to an attack, a system can be subject to cloning, counterfeiting, or IP theft. This …
Efficient Hardware Primitives For Securing Lightweight Systems, Siva Nishok Dhanuskodi
Efficient Hardware Primitives For Securing Lightweight Systems, Siva Nishok Dhanuskodi
Doctoral Dissertations
In the era of IoT and ubiquitous computing, the collection and communication of sensitive data is increasingly being handled by lightweight Integrated Circuits. Efficient hardware implementations of crytographic primitives for resource constrained applications have become critical, especially block ciphers which perform fundamental operations such as encryption, decryption, and even hashing. We study the efficiency of block ciphers under different implementation styles. For low latency applications that use unrolled block cipher implementations, we design a glitch filter to reduce energy consumption. For lightweight applications, we design a novel architecture for the widely used AES cipher. The design eliminates inefficiencies in data …
Sensor Fusion And Non-Linear Mpc Controller Development Studies For Intelligent Autonomous Vehicular Systems, Ahammad Basha Dudekula
Sensor Fusion And Non-Linear Mpc Controller Development Studies For Intelligent Autonomous Vehicular Systems, Ahammad Basha Dudekula
Dissertations, Master's Theses and Master's Reports
The demand for safety and fuel efficiency on ground vehicles and advancement in embedded systems created the opportunity to develop Autonomous controller. The present thesis work is three fold and it encompasses all elements that are required to prototype the autonomous intelligent system including simulation, state handling and real time implementation. The Autonomous vehicle operation is mainly dependent upon accurate state estimation and thus a major concern of implementing the autonomous navigation is obtaining robust and accurate data from sensors. This is especially true, in case of Inertial Measurement Unit (IMU) sensor data. The IMU consists of a 3-axis gyro, …
E-Z Door: Hands-Free Front Door Unlocking And Opening Mechanism, Caleb Dyck
E-Z Door: Hands-Free Front Door Unlocking And Opening Mechanism, Caleb Dyck
Williams Honors College, Honors Research Projects
The E-Z Door Senior Design project is a project with the aim of designing a hands-free system to unlock and open the front door of a home using two-factor security authentication.
The main goal of this project is to help people who may have physical limitations to be able to take advantage of recent technology, making it significantly easier to enter their homes.
High-Performance Spectral Methods For Computer-Aided Design Of Integrated Circuits, Zhiqiang Zhao
High-Performance Spectral Methods For Computer-Aided Design Of Integrated Circuits, Zhiqiang Zhao
Dissertations, Master's Theses and Master's Reports
Recent research shows that by leveraging the key spectral properties of eigenvalues and eigenvectors of graph Laplacians, more efficient algorithms can be developed for tackling many graph-related computing tasks. In this dissertation, spectral methods are utilized for achieving faster algorithms in the applications of very-large-scale integration (VLSI) computer-aided design (CAD)
First, a scalable algorithmic framework is proposed for effective-resistance preserving spectral reduction of large undirected graphs. The proposed method allows computing much smaller graphs while preserving the key spectral (structural) properties of the original graph. Our framework is built upon the following three key components: a spectrum-preserving node aggregation and …
Digital, Automated Reactive Target System, Nicholas Haas, Saipranay Vellala, Trandon Ware, Thomas Martin
Digital, Automated Reactive Target System, Nicholas Haas, Saipranay Vellala, Trandon Ware, Thomas Martin
Williams Honors College, Honors Research Projects
In this era, technology is woven into almost every facet of our leisure activities. Although technology has innovated hobbies ranging from chess to soccer, the art of shooting has been neglected. Unnecessary insufficiency such as bullet ricochets off of mechanical steel targets, ineffective progress tracking, and general inaccessibility to outdoor training facilities are all improvable areas of this sport. The Dynamic Automated Reactive Target (D.A.R.T) System aims to fill some of these gaps and help modernize recreational marksmanship. Modeling the system after a dueling tree will optimize the use of the system and allow for different training models to challenge …
Zips Racing Electric Can Communications, Andrew Jordan, Adam Long, Susanah Kowalewski, Rami Nehme
Zips Racing Electric Can Communications, Andrew Jordan, Adam Long, Susanah Kowalewski, Rami Nehme
Williams Honors College, Honors Research Projects
The CAN protocol has been a standard of electronic communication networks of automotive vehicles since the early 2000s due to its robust reliability in harsh environments. For the 2020 competition year, the Zips Racing Electric design team will be building an entirely new, fully-electric vehicle with CAN communication implemented rather than communicating via pure analog signals. Hardware and software can be utilized to read analog electrical signals from a source, such as accelerator and brake sensors, and encode them into a digital message that meets the CAN 2.0B communication protocol standard. Likewise, software can be used to extract data from …
Smart Collar, Gretchen T. Woodling, Sean Moran, Justen Bischoff, Jacob Sindelar
Smart Collar, Gretchen T. Woodling, Sean Moran, Justen Bischoff, Jacob Sindelar
Williams Honors College, Honors Research Projects
The Smart Collar is a universal pet tracker, designed to be small and exceedingly comfortable for any pet to wear. GPS technology is used to locate the device, allowing the user to track their pet, via a smart phone application. This application can be used to program the device, view maps of their pet’s location and history of travel. Operating primarily on Long Range Wide Area Network (LoRaWAN) for data transfer, the device consumes very little power, allowing for several days of run-time per charge of the battery. Boasting no monthly service fees, The Smart Collar provides pet owner’s an …
Kettlebell Ultra, Elissa Peters, Kathryn Wegman, Daniel Basch, Mason Pastorius
Kettlebell Ultra, Elissa Peters, Kathryn Wegman, Daniel Basch, Mason Pastorius
Williams Honors College, Honors Research Projects
This project will consist of an attachment to an average kettlebell that will track the number of repetitions that the user has performed. The device will send this data over Bluetooth to a smart phone application so the user can track their workout accurately.