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Electrical and Computer Engineering Commons

Open Access. Powered by Scholars. Published by Universities.®

Utah State University

2010

CMOS

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Full-Text Articles in Electrical and Computer Engineering

Complexity And Power Consumption In Stochastic Iterative Decoders, Keyur M. Payak Dec 2010

Complexity And Power Consumption In Stochastic Iterative Decoders, Keyur M. Payak

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Stochastic iterative decoding is a novel method to decode the bits received at the end of a communication channel and to control the rate of error happening in the message bits due to noise being injected into the channel. This decoder uses stochastic computation that is based on manipulation of probabilities from a random sequence of digital bits. Hardware needed for implementing this arithmetic is very simple and can be completely implemented using simple digital complementary metal oxide gates. This helps the decoder to be technology independent, which is a major advantage over its digital and analog counterparts, which are …