Digital Circuits Commons^™

Polysaber: A Custom Reactive Lightsaber Soundboard, Pedro B. Medeiros

Computer Engineering

The PolySaber project was developed as a custom reactive lightsaber control system built as a fully custom PCB design. The purpose of the project was to create a lower-cost and more customizable alternative to commercially available lightsaber soundboards while simultaneously providing hands-on experience in PCB design, embedded systems development, and hardware integration. Commercial lightsaber soundboards are expensive, proprietary, and difficult for hobbyists to customize. The PolySaber project addresses this by creating a modifiable hardware platform built around the ESP32 microcontroller. The system supports programmable firmware, RGB NeoPixel blade control, motion sensing, reactive swing and clash effects, onboard audio amplification, and …

Design And Verification Of The Multi-Slit Solar Explorer Camera Field Programmable Gate Arrays, Jordan M. Johnson

All Graduate Reports and Creative Projects, Fall 2023 to Present

The Multi-Slit Solar Explorer, or MUSE, is a NASA mission that will take images of the Sun to study solar flares and the solar corona. The mission will provide insight into the mechanisms behind space weather. The mission consists of two cameras: the Spectrograph (SG), and the Context Imager (CI). The Utah State University Space Dynamics Laboratory is providing both cameras for the mission.

This report describes a part of the design and verification process for a central component on these cameras known as the Field Programmable Gate Arrays (FPGAs). These FPGAs are programmed to acquire, handle, and send images …

Statistical Monitoring Of Hard Faults In Digital Systems, Dany Akshay Deep Isukapalli

Electrical Engineering Theses and Dissertations

Achieving a high test coverage is crucial for helping to ensure that integrated circuits are working correctly and are non-defective. Although scan-based structural tests are used throughout the industry, high-level functional tests may be needed to detect some defects— especially those that are environmentally sensitive. Unfortunately, the character of functional test makes it difficult to obtain high coverage, and it is even hard to estimate coverage because fault simulation times of large circuits are long. As a result, some method is required for predicting the ability of a functional test that has not been fault simulated to detect defects. In …

Open Source Asic Design Curriculum, Francisco Wilken

Master's Theses

The ever-growing importance of Application-Specific Integrated Circuits (ASICs) in a high-compute world necessitates that college graduates entering the workforce are well prepared to design them. This thesis details the design of novel ASIC curriculum, using open source tools to teach at the undergraduate level. By moving to a higher level of abstraction than classical transistor-focused coursework, chip design material can be made accessible earlier in an undergraduate degree. Additionally, open source tools provide a powerful, free, and portable platform for students to create their own designs, solving assignments focused on industry readiness. Finally, this thesis studies the results and challenges …

Breaking New Ground: Division Directly In Memory, M. Hassan Najafi, Mehran Shoushtari Moghadam

Faculty Scholarship

In-memory computing (IMC) has emerged as a promising paradigm for overcoming the limitations of traditional von Neumann architectures by reducing data movement and enhancing computational efficiency. Despite significant advancements in this area, implementing complex arithmetic operations, such as division, directly within memory has remained an elusive challenge. This paper introduces a pioneering technique for performing division operations directly in memory, representing the first successful integration of such functionality into the IMC framework. Our approach leverages an innovative circuit based on an unconventional model of computing–stochastic computing (SC). Our technique extends the computational capabilities of IMC systems and paves the way …

Design Considerations Of A Gpu, Nicholas M. Devilliers

Electrical Engineering and Computer Science Undergraduate Honors Theses

With the current era of AI technology, the era of single instruction multiple data has become an increasingly viable solution to accelerate training. The problem is that while software to use GPUs and other hardware accelerators, designing GPUs and ASIC devices has become increasingly more expensive and there aren’t great examples of generic GPUs that anyone can use and modify. In this thesis, there are four design considerations that will be discussed and how they affect the result of a generic GPU. The four considerations that were talked about in the thesis are, word width, arithmetic type, number of stages, …

Trace Flight Computer, Zachary Stratton, Vandad Mossavand Varkaneh, Nicholas Ely

Williams Honors College, Honors Research Projects

In the world of collegiate rocketry, there are currently no commercial-off-the-shelf flight computers capable of being fitted to liquid engine rockets with thrust vectoring control. Currently, amateur rocketeers utilize unreliable Arduino-based systems or expensive drone computers. The objective of this project is to design a flight computer capable of data collection and filtering, telemetry transmission, and real-time controls of critical safety systems using readily available commercial-off-the-shelf components to allow rocketeers to complete their designs within a reasonable budget. The system will collect data from two IMUs, a barometric altimeter, and a magnetometer, then filter the collected data using custom Kalman …

Autonomous Landscape Exploration Rover Using Imaging Surface Navigation (Alexis), Noah Jones, Dominic Salupo

Williams Honors College, Honors Research Projects

The objective is to develop a small-form-factor rover prototype that can be used to prove out a novel traversal method for use on extraterrestrial surfaces. The novel traversal method being proposed is LIDAR/CV-enhanced navigation, provided by a detachable flight vehicle that can communicate with the rover. On planets with thin atmospheres, cold gas thrusters or similar may be needed, but for the scope of this project more traditional flight/propulsion methods will be used.

Building A Wireless Electronic Control Unit For An Electric Vehicle, Hector S. Sosa

2024 Spring Honors Capstone Projects - Archive

Modern vehicles have a variety of features such remote start systems, advance drive assist systems, smart suspension systems, and a feature rich infotainment system. With all this technology in the car, there exists a complex network of computers working together in conjunction to deliver the modern driving experience that many people have today. To be competitive in the market, auto manufacturers are tasked to add additional features to vehicles by adding additional or modifying electronic control units (ECUs). In this study, an ECU will be designed for a mock electric vehicle which contains an already established network of ECU’s. The …

Towards A Wearable Device For Measuring Impedance Plethysmography Of The Radial Artery, Pritom Chowdhury

Dartmouth College Master’s Theses

Recent advancements in bioimpedance technology have demonstrated significant promise in the application of cardiac health monitoring. This research explores the design and development of a forearm-based wearable bioimpedance device for non-invasive measurement of heart rate and respiratory rate at an accuracy level comparable to medical-grade monitors. It utilizes a tetrapolar electrode configuration to analyze bioimpedance changes in the radial artery due to blood flow.

An ongoing aspect of this work involves the preliminary development of an embedded framework intended to integrate signal generation, acquisition, and processing within the device to achieve compact and efficient system design, anticipated to contribute to …

A Novel Processor Architecture Implementing The Stacked Error Diffusion Algorithm And Its Zynq-Based Realization, Qishi Hu

Theses and Dissertations--Electrical and Computer Engineering

Digital halftoning reproduces continuous-tone images using patterns of black and white dots, while multitoning extends this concept by incorporating inks with intermediate intensities. These techniques are extensively utilized in the printing industry to accommodate the limited range of inks available in printers. Stacked error diffusion is a high-quality multitoning algorithm that adheres to the blue-noise dithering standard. This thesis research studies the potential parallelism inherent in the algorithm and introduces the design of a novel processor architecture optimized for efficient execution. The architecture is realized on an FPGA development board featuring a Zynq SoC. Additionally, the hardware prototype can also …

Gen-Acceleration: Pioneering Work For Hardware Accelerator Generation Using Large Language Models, Durga Lakshmi Venkata Deepak Vungarala

Theses

Optimizing computational power is critical in the age of data-intensive applications and Artificial Intelligence (AI)/Machine Learning (ML). While facing challenging bottlenecks, conventional Von-Neumann architecture with implementing such huge tasks looks seemingly impossible. Hardware Accelerators are critical in efficiently deploying these technologies and have been vastly explored in edge devices. This study explores a state-of-the-art hardware accelerator; Gemmini is studied; we leveraged the open-sourced tool. Furthermore, we developed a Hardware Accelerator in the study we compared with the Non-Von-Neumann architecture. Gemmini is renowned for efficient matrix multiplication, but configuring it for specific tasks requires manual effort and expertise. We propose implementing …

Electronic Note-String Detector, Gavin Garcia-Rossi, Tommy Smail

Electrical Engineering

As the virtual space has become a dominant part of everyone’s day-to-day lives, many normal face-to-face interactions and services have not yet been facilitated by adapting technology. One of these prevailing areas is music lessons. Over Zoom meetings, or other virtual platforms, it is tremendously challenging to teach students. These challenges include recognizing student mistakes audibly and visually, and being able to give confident feedback on the incorrect notes played by learning musicians. Without having to delve into improving the complex systems that would be required to improve audio, video, and connection quality of these connections, we have another solution …

Low-Power, Event-Driven System On A Chip For Charge Pulse Processing Applications, Joseph A. Schmitz

Department of Electrical and Computer Engineering: Dissertations, Theses, and Student Research

This dissertation presents an electronic architecture and methodology capable of processing charge pulses generated by a range of sensors, including radiation detectors and tactile synthetic skin. These sensors output a charge signal proportional to the input stimulus, which is processed electronically in both the analog and digital domains. The presented work implements this functionality using an event-driven methodology, which greatly reduces power consumption compared to standard implementations. This enables new application areas that require a long operating time or compact physical dimensions, which would not otherwise be possible. The architecture is designed, fabricated, and tested in the aforementioned applications to …

Accelerating Machine Learning Inference For Satellite Component Feature Extraction Using Fpgas., Andrew Ekblad

Theses and Dissertations

Running computer vision algorithms requires complex devices with lots of computing power, these types of devices are not well suited for space deployment. The harsh radiation environment and limited power budgets have hindered the ability of running advanced computer vision algorithms in space. This problem makes running an on-orbit servicing detection algorithm very difficult. This work proposes using a low powered FPGA to accelerate the computer vision algorithms that enable satellite component feature extraction. This work uses AMD/Xilinx’s Zynq SoC and DPU IP to run model inference. Experiments in this work centered around improving model post processing by creating implementations …

Towards Multipronged On-Chip Memory And Data Protection From Verification To Design And Test, Senwen Kan, Jennifer Dworak

Computer Science and Engineering Theses and Dissertations

Modern System on Chips (SoCs) generally include embedded memories, and these memories may be vulnerable to malicious attacks such as hardware trojan horses (HTHs), test access port exploitation, and malicious software. This dissertation contributes verification as well as design obfuscation solutions aimed at design level detection of memory HTH circuits as well as obfuscation to prevent HTH triggering for embedded memory during functional operation. For malicious attack vectors stemming from test/debug interfaces, this dissertation presents novel solutions that enhance design verification and securitization of an IJTAG based test access interface. Such solutions can enhance SoC protection by preventing memory test …

Algorithm Optimization And Hardware Acceleration For Machine Learning Applications On Low-Energy Systems, Jianchi Sun

All Dissertations

Machine learning (ML) has been extensively employed for strategy optimization, decision making, data classification, etc. While ML shows great triumph in its application field, the increasing complexity of the learning models introduces neoteric challenges to the ML system designs. On the one hand, the applications of ML on resource-restricted terminals, like mobile computing and IoT devices, are prevented by the high computational complexity and memory requirement. On the other hand, the massive parameter quantity for the modern ML models appends extra demands on the system's I/O speed and memory size. This dissertation investigates feasible solutions for those challenges with software-hardware …

Side Channel Attack Counter Measure Using A Moving Target Architecture, Jithin Joseph

Electrical and Computer Engineering ETDs

A novel countermeasure to side-channel power analysis attacks called Side-channel Power analysis Resistance for Encryption Algorithms using DPR or SPREAD is investigated in this thesis. The countermeasure leverages a strategy that is best characterized as a moving target architecture. Modern field programmable gate arrays (FPGA) architectures provide support for dynamic partial reconfiguration (DPR), a feature that allows real-time reconfiguration of the programmable logic (PL). The moving target architecture proposed in this work leverages DPR to implement a power analysis countermeasure to side-channel attacks, the most common of which are referred to as differential power analysis (DPA) and correlation power analysis …

Designing Novel Hardware Security Primitives For Smart Computing Devices, Amitkumar Degada

Theses and Dissertations--Electrical and Computer Engineering

Smart computing devices are miniaturized electronics devices that can sense their surroundings, communicate, and share information autonomously with other devices to work cohesively. Smart devices have played a major role in improving quality of the life and boosting the global economy. They are ubiquitously present, smart home, smart city, smart girds, industry, healthcare, controlling the hazardous environment, and military, etc. However, we have witnessed an exponential rise in potential threat vectors and physical attacks in recent years. The conventional software-based security approaches are not suitable in the smart computing device, therefore, hardware-enabled security solutions have emerged as an attractive choice. …

A 2.56 Gbps Serial Wireline Transceiver That Supports An Auxiliary Channel And A Hybrid Line Driver To Compensate Large Channel Loss, Xiaoran Wang

Electrical Engineering Theses and Dissertations

Serial transceiver links are widely used for high-speed point-to-point communications. This dissertation describes two transceiver link designs for two different applications.

In serial wireline communications, security is an increasingly important factor to concern. Securing an information processing system at the application and system software layers is regarded as a necessary but incomplete defense against the cyber security threats. In this dissertation, an asynchronous serial transceiver that is capable of transmitting and receiving an auxiliary data stream concurrently with the primary data stream is described. The transceiver instantiates the auxiliary data stream by modulating the phase of the primary data without …

Heuristic-Based Threat Analysis Of Register-Transfer-Level Hardware Designs, Wesley Layton Ellington

Electrical Engineering Theses and Dissertations

The development of globalized semiconductor manufacturing processes and supply chains has lead to an increased interest in hardware security as new types of hardware based attacks, called hardware Trojans, are being observed in industrial and military electronics. To combat this, a technique was developed to help analyze hardware designs at the register-transfer-level (RTL) and locate points of interest within a design that might be vulnerable to attack. This method aims to eventually enable the creation of an end-to-end design hardening solution that analyzes existing designs and suggests countermeasures for potential Trojan attacks. The method presented in this work uses a …

Systematic Model-Based Design Assurance And Property-Based Fault Injection For Safety Critical Digital Systems, Athira Varma Jayakumar

Theses and Dissertations

With advances in sensing, wireless communications, computing, control, and automation technologies, we are witnessing the rapid uptake of Cyber-Physical Systems across many applications including connected vehicles, healthcare, energy, manufacturing, smart homes etc. Many of these applications are safety-critical in nature and they depend on the correct and safe execution of software and hardware that are intrinsically subject to faults. These faults can be design faults (Software Faults, Specification faults, etc.) or physically occurring faults (hardware failures, Single-event-upsets, etc.). Both types of faults must be addressed during the design and development of these critical systems. Several safety-critical industries have widely adopted …

Evaluation And Analysis Of Null Convention Logic Circuits, John Davis Brady

Graduate Theses and Dissertations

Integrated circuit (IC) designers face many challenges in utilizing state-of-the-art technology nodes, such as the increased effects of process variation on timing analysis and heterogeneous multi-die architectures that span across multiple technologies while simultaneously increasing performance and decreasing power consumption. These challenges provide opportunity for utilization of asynchronous design paradigms due to their inherent flexibility and robustness.

While NULL Convention Logic (NCL) has been implemented in a variety of applications, current literature does not fully encompass the intricacies of NCL power performance across a variety of applications, technology nodes, circuit scale, and voltage scaling, thereby preventing further adoption and utilization …

Weight Controlled Electric Skateboard, Zachary Barram, Carson Bertozzi, Vishnu Dodballapur

Computer Engineering

Technology and the way that humans interact is becoming more vital and omnipresent with every passing day. However, human interface device designers suffer from the increasingly popular “designed for me or people like me” syndrome. This design philosophy inherently limits accessibility and usability of technology to those like the designer. This places severe limits of usability to those who are not fully able as well as leaves non-traditional human interface devices unexplored. This project set out to explore a previously uncharted human interface device, on an electric skateboard, and compare it send user experience with industry leading human interface devices.

Tidalsim Senior Project Report, Kent Zhang, Colin Vandervoort

Computer Engineering

Throughout the course of this project, our team helped the Cal Poly Biological Sciences department refine an intertidal zone simulator. The aim of this device is to allow any marine biologist to easily simulate a vast range of tidal zones in order to test animal behaviors within these zones. Another goal of this project is to make each simulation tank independent from the others by using a single microcontroller to handle all inputs and outputs of the system as well as logging all relevant data. The current system is set up so that a separate microcontroller handles dissolved oxygen and …

Asynchronous Circuit Synthesis Using Multi-Threshold Null Convention Logic, Nicholas Renoudet Mize

Graduate Theses and Dissertations

As the demand for an energy-efficient alternative to traditional synchronous circuit design grows, hardware designers must reconsider the traditional clock tree. By doing away with the constrains of a clock, asynchronous sequential circuit designs can achieve a much greater level of efficiency. The utilization of asynchronous logic synthesis flows has enabled researchers to better implement asynchronous circuit designs which have been optimized using the same industry standard tools that are already used in sequential synchronous designs. This thesis offers a new flow for such tools which implements the MTNCL asynchronous circuit architecture.

An Rs-485 Transceiver In A Silicon Carbide Cmos Process, Maria Raquel Benavides Herrera

Graduate Theses and Dissertations

This thesis presents the design, simulation and test results of a silicon carbide (SiC) RS-485 transceiver for high temperature applications. This circuit is a building block in the design and fabrication of a digital data processing and control system. Automation processes for extreme environments, remote connection to high temperature locations, deep earth drilling, and high temperature data acquisition are some of the potential applications for such a system. The transceiver was designed and developed in a 1.2 µm SiC-CMOS process by Raytheon Systems, Ltd. (UK). It has been tested with a supply voltage of 12 V and 15 V, temperatures …

Investigating The Effect Of Detecting And Mitigating A Ring Oscillator-Based Hardware Trojan, Lakshmi Ramakrishnan

Electrical Engineering Theses and Dissertations

The outsourcing of the manufacturing process of integrated circuits to fabrications plants all over the world has exposed these chips to several security threats, especially at the hardware level. There have been instances of malicious circuitry, such as backdoors, being added to circuits without the knowledge of the chip designers or vendors. Such threats could be immensely powerful and dangerous against confidentiality, among other vulnerabilities.

Defense mechanisms against such attacks have been probed and defense techniques have been developed. But with the passage of time, attack techniques have improved immensely as well. From directly observing the inputs or outputs, adversaries …

Efficacy Of Multi-Threshold Null Convention Logic In Low-Power Applications, Brent Bell

Graduate Theses and Dissertations

In order for an asynchronous design paradigm such as Multi-Threshold NULL Convention Logic (MTNCL) to be adopted by industry, it is important for circuit designers to be aware of its advantages and drawbacks especially with respect to power usage. The power tradeoff between MTNCL and synchronous designs depends on many different factors including design type, circuit size, process node, and pipeline granularity. Each of these design dimensions influences the active power and the leakage power comparisons. This dissertation analyzes the effects of different design dimensions on power consumption and the associated rational for these effects. Results show that while MTNCL …

Genetic Algorithm Amplifier Biasing System (Gaabs): Genetic Algorithm For Biasing On Differential Analog Amplifiers, Sean Whalen

Computer Engineering

Genetic Algorithm Amplifier Biasing System (GAABS) - Senior Project Analysis

Summary of Functional Requirements

This project integrates LTSpice with a python script that runs a genetic algorithm to bias a differential amplifier. The system biases the amplifier with 2 different voltages, the base voltage for the PNP BJTs of the active loads and a voltage controlling the current of the current sink. The project runs via a python script, gets data from LTSpice’s command line call, and iteratively runs until the system is biased to achieve the greatest gain on an arbitrary input voltage.

Primary Constraints

Some of the main …