Engineering Commons^™

Birkman Screening And The Covariance Of The Fluid Velocity Of Fixed Beds, Ashok S. Sangani, Donald L. Koch, Reghan J. Hill

Biomedical and Chemical Engineering - All Scholarship

The phenomenon of Brinkman screening, whereby the fluid velocity disturbance produced by each particle in a fixed bed is attenuated by the forces that the fluid exerts on surrounding particles, plays a crucial role in limiting the range of velocity correlations in porous media and fixed beds. Koch and Brady [J. Fluid Mech. 154, 399 (1985)] showed theoretically that Brinkman screening leads to a finite hydrodynamic diffusion coefficient for fluid phase tracers in dilute fixed beds. In this Letter, we present the results of two simulation techniques (lattice-Boltzmann method and a multipole method) confirming the screening of the fluid velocity …

Tissue Engineering: At The Interface Between Engineering, Biology And Medicine, Brenda Ogle, Priti Gairola, Jodi Balik, Daniel L. Mooradian

Journal of the Minnesota Academy of Science

No abstract provided.

Design And Fabrication Of A Field Programmable Logic Array, Robert Cavagnaro

Journal of the Microelectronic Engineering Conference

Unlike conventional hard programmed gate arrays, the Field Programmable Logic Array (FLPA) offers the end user the ability to instantly change the outputted function of the circuit through an external electronic programming sequence. This project outlines the design and fabrication of a P Well CMOS NOR logic FPLA. Consisting of roughly 1,400 transistors, three major functional components were designed: Floating Tunnel Oxide EEPROM memory bank, an EEPROM addressing system, and a 3 input I 3 output / 2 return state programmable logic array. Fabrication was carried out at the RIT fabrication facility and upon testing the completed devices it was …

Simox Cmos Process Design And Fabrication, Andrew Phillips

Journal of the Microelectronic Engineering Conference

The first Thin Film Transistor (TFT) CMOS process for RIT’s Semiconductor Processing Center utilizing SIMOX wafers was developed. A standard 9 mask-set P-well CMOS process flow originally designed for bulk silicon was modified to accommodate the new starting material.

Monolithic Integration Of Mems Structures And Cmos Circuitry, Alfredo Torrejon

Journal of the Microelectronic Engineering Conference

A modular approach, based on work done at Sandia National Laboratories, for the monolithic integration of a microelectrornechanical system (MEMS) process and an electronics process is being investigated. A preliminary outline for an integrated two-level polysilicon MEMS/p-welI CMOS process that can be fabricated in RIT’s facilities has been created. This is a MEMS-first approach that places the MEMS in an isolation trench and then seals off the MEMS during CMOS processing. A recipe based on potassium hydroxide wet etching has been developed for the isolation trench etch. Masks for a simple test chip have been created to assist in troubleshooting …

Simulation And Tolerance Determination For Lateral Cmos Devices, Matthew Scarpino

Journal of the Microelectronic Engineering Conference

SUPREM4 simulation for lateral DMOSFET’s are discussed, as well as the Medici simulation of their electrical characteristics. The actual processing parameters of the device simulation are shown, and the theory surrounding device operation is discussed. The three electrical tests — IDNDS characteristic, VT determination, and the breakdown VDS are explained with the testing method used for each. The four process variations — substrate doping, well dose, well drive in temperature, and oxidation temperature are presented as well as their theoretical effects on device performance. Finally, the results of the electrical tests are presented with conclusions regarding the effects of the …

Process Development For Porous Silicon Light-Emitting Devices, Jason Benz

Journal of the Microelectronic Engineering Conference

The primary focus of this project was to continue process development of integrated PSibased (porous silicon) LEDs. Porous silicon is a light-emitting material formed by electrochemical etching of the silicon substrate, resulting in the formation of pores and wire-like silicon structures [1]. This study investigates new strategies in the effort to advance the implementation of PSi-based LEDs with standard CMOS technology by providing devices that are substrate-based, electrically isolated, array-addressable and voltage modulated. Existing problems with porous silicon LEDs include high bias operation, low external quantum efficiency (EQE), and poor stability. This work has resulted in the fabrication of LEDs …

Fabrication Of Thin Film Electroluminescent Devices For Display Applications, Tiffany Noble

Journal of the Microelectronic Engineering Conference

A preliminary effort in Electroluminescent (EL) device fabrication at Rochester Institute of Technology’s Microelectronic Engineering Fabrication Facilities was attempted in this study. The fabrication of several AC driven electroluminescent devices, on silicon substrates were studied. Devices were fabricated on heavily doped p-type silicon, with tantalum pentaoxide dielectric and various phosphor materials. No working devices were fabricated in this initial attempt. However, deeper understanding of the functionality of each layer was gained.

Atmospheric Pressure Cvd Of Teos, Daniel Ma

Journal of the Microelectronic Engineering Conference

The goal of this project is to install an atmospheric pressure chemical vapor deposition of tetraethoxysilane (APCVD TEOS) process at RIT. The advantage of atmospheric TEOS includes, among many reasons, good uniformity, high deposition rate, superior step coverage and conformality, ease of handling, stability, and safety. In developing the process, an experimental design was utilized, using factors: deposition temperature, bubbler temperature, and N2 carrier gas flow were examined. Responses include: deposition rate on silicon, deposition rate on oxide, thickness uniformity, refractive index, refractive index uniformity, and etch rate in hydrofluoric acid. Etch rate after 30mm @ 1050°C anneal, dielectric properties, …

Titanium Nitride Diffusion Barriers And Schottky Diodes, Andrew Woodard

Journal of the Microelectronic Engineering Conference

Titanium nitride was studied for use in two applications: as a barrier metal in an aluminum metallization and as a Schottky diode metal on n type silicon(N_D = 1X10¹⁵/cm³). The films were reactively sputtered in an RiT magnetron configuration using a Perkin-Elmer 2400 sputtering system. Effects of heat treatment temperature on performance were studied for both applications. TiN as sputtered in this experiment was shown to be an effective barrier against Al-Si interdiffusion. Annealing temperature was shown to affect the Schottky barrier height, which ranged from 471 to 658 mV as calculated from specific contact …

Work Function Of Refractory Metals And Nitrides From Cv Analysis, Benjamin M. Kaltaler

Journal of the Microelectronic Engineering Conference

The work function of p-type and n-type metal electrode materials deposited by RF magnetron sputtering in argon was determined by CV measurements on MOS capacitors. In addition, the work function of p-type and n-type nitride electrode materials deposited by rf magnetron sputtering in nitrogen was also determined by CV measurements on MOS capacitors. The metals deposited were molybdenum, tantalum, titanium, and aluminum. The nitrides deposited contained the metals listed previously with the exception of aluminum. The work functions were determined to be 4.70 +1- 0.49 eV for Al, 4.46 +1- 0.26 eV for Mo, and 4.22 eV for Ta. Capacitors …

Stacked Floating Gate Eeprom, Ing-Cheng Chai

Journal of the Microelectronic Engineering Conference

The concept of SFGEEPROM involves the replacement of the standard EEPROM’s floating gate with a multi-layer stacked of Silicon (Si) and Silicon Dioxide (SiO₂). This multi-layer stack of Si and SiO₂ is either deposited via sputtering or CVD and followed by annealing (see Figure 1). Carriers will be injected from the n+ polysilicon layer into the multi-stacked layers, and those carriers will be confined to the silicon crystallites with the thin oxide barriers between silicon layers. The distribution of charge within the stack will alter the field-effect on the underlying silicon substrate. This type of structure may …

Comparison Of Minority Carrier Lifetime Measurement By Surface Charge And Capacitance - Time Analysis, David Lundeen

Journal of the Microelectronic Engineering Conference

Minority carrier lifetimes are a useful parameter in both the design and manufacture of discrete and integrated circuits. With today’s emphasis on MOS technology, minority carriers are used as a “process cleanliness” tool in a manufacturing environment. The purpose of this project is to compare the two available carrier lifetime tests, namely the Semitest Surface Charge Analyzer (SCA) and capacitance-time and seeing if the relationship is linear. Being linear, the more process intensive capacitance-time test can be avoided and all pertinent data can be extracted via the SCA, therefore increasing product cycle time and time to market. 200A thermal oxide …

Automated Wafer Testing, Michael Volo

Journal of the Microelectronic Engineering Conference

A test system was installed at JUT that can automatically test every die on a wafer without any operator interruption. The system integrates a Rucker & Kolls 681A wafer probe station, an HP4145 parameter analyzer, an HP Apollo work station, and a Keithley switch matrix. IC-CAP software was used for system control and data extraction. The system was designed to be flexible so additional tests can he added. Any process and any test that an HP4145 can complete manually can be tested using the automated system. Only a few variables regarding die size, device location, data extraction methods, and HP4145 …

Preparation Of Rit For 157-Nm Lithography, Brian Lee Porter

Journal of the Microelectronic Engineering Conference

This project investigated the feasibility of 157-nm Vacuum UltraViolet (VUV) Lithography and its’ possible utilization as a future source to extend the capabilities of optical lithography. In addition, this project undertook the initialization of VUV lithography here at JUT by the conversion of a 193-nm ArF excimer laser to a 157-nm F2 excimer laser source. The investigation of the completed body of work on 157-nm lithography led to the conclusion that this technology is viable and may represent the last frontier with respect to optical lithography. The excimer laser at RIT was successfully retrofitted for 157-nm operation and exhibited RIT’s …

Quadrupole Apertures For 193nm Lithography, Michael Cangemi

Journal of the Microelectronic Engineering Conference

Strong and weak quadrupole apertures have been optimized and fabricated for relatively dense O.12~im geometry’s. All of the apertures were optimized using PROLITH/2 simulation software. The apertures were fabricated as fused silica reticles that are inserted at the lens pupil plane. The apertures change the illumination profile that is collected by the condenser lens. Depth of focus (DOF) is increased using quadrupole illumination when trying to resolve specific pitch values.

Development Rate Monitor: Process Integration And Resist Parameter Extraction, Joshua Roberge

Journal of the Microelectronic Engineering Conference

Development rate measurement (DRM) analysis yields very accurate resist modeling parameters. A procedure for extracting these parameters was instituted for the Perkin-Elmer DRM tool at RET. New software packages for the DRM tool and ProDRM simulations were used to extract development rate parameters for current i line resists. The process established will be repeated for future resists.

Characterization Of An Organic, Wet Develop, Broadband, Experimental Back Anti-Reflective Coating (Barc), Robert Kress

Journal of the Microelectronic Engineering Conference

The objective of this project is to characterize Brewer Science EXP97O11 experimental broadband back anti-reflective coating (BARC). This BARC was designed to function at both i-line (365 nm) and g-line (436 urn). The focus of this experiment is to incorporate the BARC process into existing lithography processes at RIT. A “Poor Man’s” DRM was performed on both the BARC as well as Shipley 812 photoresist to determine optimum develop time as well as optimum bake temperature for the BARC. Once the optimum conditions were found, several wafers were processes through 1st level lithography using the BARC on a polysilicon layer …

Chemical Mechanical Pad Characterization Using Shallow Trench Isolation Structures, James K. Zelenak

Journal of the Microelectronic Engineering Conference

In this study the effects of front-side pad composition were examined for a chemical mechanical polishing process. The examination involved evaluation of film removal uniformity across the wafer surface and within each die, dishing effects, and selectivity between silicon nitride and CVD oxides. Trenches were fabricated in the substrate via dry etch, the resultant depth was 1.5 μm. The trench backfill was accomplished with a CVD low temperature oxide. Best results were obtained using a dense single layer polish pad, which exhibited imperceptible dishing and wafer polish uniformity on par with all other combinations.

Endpoint Detection In Cmp Utilizing Thermal Imaging, Rick Anundson

Journal of the Microelectronic Engineering Conference

The objective of this project was to develop a method for using thermal imaging to determine end-point in chemical mechanical polishing (C.M.P.) for a shallow trench isolation (S.T.L) C.M.P. process and contact layer C.M.P. process. A two-dimensional thermal imaging camera was used to measure the pad temperature during processing. The pad temperature is an indication of the friction between the pad and the wafer being processed. As the polishing process transitions from one layer of material to the next layer of material the amount of heat generated will change. For the STI layer a 0.3 to 0.4 degree Fahrenheit (F) …

Lateral Resistance Of Ring-Shank Nail Connections In Southern Pine Lumber, R D. Theilen, D A. Bender, David Pollock, S G. Winistorfer

Faculty Publications - Biomedical, Mechanical, and Civil Engineering

Ring-shank nails are used in engineered structures with lateral connection design values based on theoretically derived equations which were validated only for common nails. The goal of this study was to quantify the input parameters and lateral connection strength of several types of ring-shank nails in Southern Pine lumber and critically evaluate the applicability of the theoretical equations for ring-shank nails.

Two sizes of galvanized and ungalvanized, hardened steel ring-shank nails from two manufacturers were studied. The hardened, ring-shank nails carried significantly higher loads than the common wire nails studied. Because the current method of determining yield load does not …

Optimal Choices Of Potential Functions In Fuzzy Clustering, Vladik Kreinovich, Hung T. Nguyen, Yeung Yam

Departmental Technical Reports (CS)

Fuzzy logic-based clustering techniques are widely used in situations where statistical assumptions are not valid. Whether in estimating cluster centers for model identification purposes or in determining clusters the existing techniques are essentially based upon the choice of some potential functions. As in any design problems of this kind, the choice of such a function has to be justified on a theoretical basis. In this work, we set up a decision frame work and show that optimal potential functions are the ones which are used in current techniques.

Personal Reflections On Psi In Engineering Mechanics, David Haws

Civil Engineering Faculty Publications and Presentations

There seems to be little argument that our students need to be encouraged toward educational selfdirectedness. Yet self-direction must be based on past learning success and present learning readiness. There is at least a potential conflict here: students needs to assume responsibility for their own education, directing it to topics of their own choosing, but their learning must also at least occasionally be directed along a hierarchical path of sequentially dependent learning objectives (which path may not be so obvious to the uninitiated). The Personalized System of Instruction (PSI) seems to enable both of these not-always-compatible goals. PSI allows the …

Nebraska Summary 301: Massey Ferguson 6255 Diesel 32-Speed, Nebraska Tractor Test Lab

Nebraska Tractor Tests

ABOUT THE TEST REPORT AND USE OF THE DATA

The test data contained in this report are a tabulation of the results of a series of tests. Due to the restricted format of these pages, only a limited amount of data and not all of the tractor specifications are included. The full OECD report contains usually about 30 pages of data and specifications. The test data were obtained for each tractor under similar conditions and therefore, provide a means of comparison of performance based on a limited set of reported data.

EXPLANATION OF THE TEST PROCEDURES

Purpose

The purpose of …

Fall 1998, 90.9 Wmpg Fm

WMPG Program Guides

No abstract provided.

Test 1751: Caterpiller Challenger 95e Diesel 10-Speed, Nebraska Tractor Test Lab

Nebraska Tractor Tests

EXPLANATION OF THE TEST PROCEDURE General Tractors are tested at the University of Nebraska according to the Agricultural Tractor Test Code approved by the American Society of Agricultural Engineers and the Society of Automotive Engineers or official Nebraska test procedure. The manufacturer selects the tractor to be tested and certifies that it is a stock model. Each tractor is equipped with the common power consuming accessories such as power steering, power lift pump, generator, etc., if available. Power consuming accessories may be disconnected only when the means for disconnecting can be reached from the operating station. An official representative of …

Human Visual Perception And Kolmogorov Complexity: Revisited, Vladik Kreinovich, Luc Longpre

Departmental Technical Reports (CS)

Experiments have shown that we can only memorize images up to a certain complexity level, after which, instead of memorizing the image itself, we, sort of, memorize a probability distribution in terms of which this image is "random" (in the intuitive sense of this word), and next time, we reproduce a "random" sample from this distribution. This random sample may be different from the original image, but since it belongs to the same distribution, it, hopefully, correctly reproduces the statistical characteristics of the original image.

The reason why a complex image cannot be accurately memorized is, probably, that our memory …

Run-Time Correctness Checking Is Algorithmically Undecidable For Pointer Data Structures, Mikhail Auguston, Vladik Kreinovich, Luc Longpre

Departmental Technical Reports (CS)

Programs routinely use complicated pointer (linked list-type) data structures such as linked lists, doubly linked lists, different types of trees, etc. These data structures are usually defined {\it inductively}: e.g., a tree can be defined as a structure that results from an empty tree by an arbitrary sequence of adding and deleting elements.

When the program runs, these data structures take dynamically changing shapes. To test program correctness, it is important to check, at run-time, whether a current shape is a correct implementation of the corresponding structure. Algorithms are known for checking the ``shape correctness'' for basic pointer-based data structures …

Telemanipulation: The Virtual Tool Approach And Its Interval-Based Justification, Vladik Kreinovich, Luic Olac Fuentes

Departmental Technical Reports (CS)

No abstract provided.

Application Of Kolmogorov Complexity To Image Compression: It Is Possible To Have A Better Compression, But It Is Not Possible To Have The Best One, Sanjeev Subbaramu, Ann Q. Gates, Vladik Kreinovich

Departmental Technical Reports (CS)

No abstract provided.