Open Access. Powered by Scholars. Published by Universities.®

Engineering Commons

Open Access. Powered by Scholars. Published by Universities.®

Theses/Dissertations

2006

FPGA

University of Central Florida

Articles 1 - 1 of 1

Full-Text Articles in Engineering

Pipelining Of Double Precision Floating Point Division And Square Root Operations On Field-Programmable Gate Arrays, Anuja Thakkar Jan 2006

Pipelining Of Double Precision Floating Point Division And Square Root Operations On Field-Programmable Gate Arrays, Anuja Thakkar

Electronic Theses and Dissertations

Many space applications, such as vision-based systems, synthetic aperture radar, and radar altimetry rely increasingly on high data rate DSP algorithms. These algorithms use double precision floating point arithmetic operations. While most DSP applications can be executed on DSP processors, the DSP numerical requirements of these new space applications surpass by far the numerical capabilities of many current DSP processors. Since the tradition in DSP processing has been to use fixed point number representation, only recently have DSP processors begun to incorporate floating point arithmetic units, even though most of these units handle only single precision floating point addition/subtraction, multiplication, …