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Articles 1501 - 1530 of 1828

Full-Text Articles in Engineering

Rad Module Infrastructure Of The Field-Programmable Port Extender (Fpx) Version 2.0, David E. Taylor, John W. Lockwood, Naji Naufel Jan 2001

Rad Module Infrastructure Of The Field-Programmable Port Extender (Fpx) Version 2.0, David E. Taylor, John W. Lockwood, Naji Naufel

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The Field-programmable Port eXtender (FPX) provides dynamic, fast, and flexible mechanisms to process data streams at the ports of the Washington University Gigabit Switch (WUGS-20). In order to facilitate the design and implementation of portable hardware modules for the Reprogrammable Application Device (RAD) on the FPX board, infrastructure components have been developed. These components abstract application module designers from device-specific timing specifications of off-chip memory devices, as well as processing system-level control cells. This document describes the design and internal functionality of the infrastructure components and is intended as a reference for future component revisions and additions. Application module designers …

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Relationship Between Two Generalized Images For Discrete And Differential Camera Motions, Robert Pless Jan 2001

Relationship Between Two Generalized Images For Discrete And Differential Camera Motions, Robert Pless

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The recent popularity of catadioptic and multi-camera imaging systems indicates a need to create formal models for general, non-perspective camera geometries. Development of algorithmic tools for interpreting images from a generalized camera model will lead to a better understanding of how to design camera systems for particular tasks. Here we define the corollary to epi-polar constraints for standard cameras - the relationship between two images of a scene taken by generalized cameras from viewpoints related by discrete or differential motions.

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Legends As A Device For Interacting With Visualizations, Mihail E. Tudoreanu, Eileen Kraemer Jan 2001

Legends As A Device For Interacting With Visualizations, Mihail E. Tudoreanu, Eileen Kraemer

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Users and developers of visualization tools must deal with the problem of specifying what information to show and how to represent it. Typically, the user's focus of interest will change over time, and the specifications must change with the user's interests. Techniques for the simple, direct, and intuitive creation and refinement of these specifications can be useful. In this paper we show how legends, a natural element of graphical displays, may be used as a direct and unobstrusive interaction device through which users may interactively specify new visualizations and animations.

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Services Provision In Ad Hoc Networks, Radu Handorean, Gruia-Catalin Roman Jan 2001

Services Provision In Ad Hoc Networks, Radu Handorean, Gruia-Catalin Roman

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The client-server model continues to dominate distributed computing with increasingly more flexible variants being deployed. Many are centered on the notion of discovering services at run time and on allowing any system component to act as a service provider. The result is a growing reliance on the service registration and discovery mechanisms. This paper addresses the issue of facilitating such service provision capabilities in the presence of (logical and physical) mobility exhibited by applications executing over ad hoc networks. The solution being discussed entailes a new kind of service model, which we were able to build as an adaption layer …

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Dres: Internet Resource Management Using Deferred Reservations, Samphel Norden Jan 2001

Dres: Internet Resource Management Using Deferred Reservations, Samphel Norden

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In this proposal, we consider the problem of resource reservation for Integrated Services (IntServ) and Differentiated Services (DiffServ) networks. Current approaches for resource reservation in INtegrated Service Networks adopt an all-or-nothing approach, where partially acquired resources must be released if resources are not available at all routers on the chosen path. Furthermore, under high load, end-systems must retry requests repeatedly leading to inefficient allocation and increased traffic. We propose a new approach called Deferred REServation (DERS) that substantially improves performance (reduces the overall cell rejection probability and increases link utilization) over the all-or-nothing reservation approach. Call admissibility is increased by …

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Layered Protocol Wrappers For Internet Packet Processing In Reconfigurable Hardware, Florian Braun, John Lockwood, Marcel Waldvogel Jan 2001

Layered Protocol Wrappers For Internet Packet Processing In Reconfigurable Hardware, Florian Braun, John Lockwood, Marcel Waldvogel

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The ongoing increases of line speed in the Internet backbone combined with the need for increased functionality of network devices presents a major challenge. These demands call for the use of reprogrammable hardware to provide the required flexible, high-speed functionality, at all network layers. The Field Programmable Port Extender (FPX) provides such an environment for development of networking components in reprogrammable hardware. We present a framework to streamline and simplify networking applications that process ATM cells, AAL5 frames, Internet Protocol (IP) packets and UDP datagrams directly in hardware.

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Scalable Ip Lookup For Programmable Routers, David E. Taylor, John W. Lockwood, Todd Sproull, David B. Parlour Jan 2001

Scalable Ip Lookup For Programmable Routers, David E. Taylor, John W. Lockwood, Todd Sproull, David B. Parlour

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Continuing growth in optical link speeds places increasing demands on the performance of Internet routers, while deployment of embedded and distributed network services imposes new demands for flexibility and programmability. IP adress lookup has become a significant performance bottleneck for the highest performance routers. New commercial products utilize dedicated Content Addressable Memory (CAM) devides to achieve high lookup speeds. This paper describes an efficient, scalable lookup engine design, able to achieve high-performance with the use of a small portion of a reconfigurable logic device and a commodity Random Access Memory (RAM) device. Based on Eatherton's Tree Bitmap algorithm [1] the …

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Synthesizable Design Of A Multi-Module Memory Controller, Sarang Dharmapurikar, John W. Lockwood Jan 2001

Synthesizable Design Of A Multi-Module Memory Controller, Sarang Dharmapurikar, John W. Lockwood

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Random Access Memory (RAM) is a common resources needed by networking hardware modules. Synchronous Dynamic RAM (SDRAM) provides a cost effective solution for such data storage. As the packet processing speeds in the hardware increase memory throughput can be a bottleneck to achieve overall high performance. Typically there are multiple hardware modules which perform different operations on the packet payload and hence all try to access the common packet buffer simultaneously. This gives rise to a need for a memory controller which arbitrates between the memory requests made by different modules and maximizes the memory throughput. This paper discusses the …

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Obiwan - An Internet Protocol Router In Reconfigurable Hardware, Florian Braun, Marcel Waldvogel, John Lockwood Jan 2001

Obiwan - An Internet Protocol Router In Reconfigurable Hardware, Florian Braun, Marcel Waldvogel, John Lockwood

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The ongoing exponential increase of line speed in the Internet and combined with the uncountable requests for increased functionality of network devices presents a major challenge. These demands call for the use of reprogrammable hardware to provide the required flexible high-speed functionaltiy. The Field Programmable Port Extender (FPX) provides such an environment for development of networking components in reprogrammable hardware. We present the high-speed IP routing components in reprogrammable hardware. We present the high-speed IP routing module "OBIWAN" (Optimal Binary search IP lookup for Wide Area Networks) built on top of an IP processing framework.

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Network Abstractions For Context-Aware Mobile Computing, Gruia-Catalin Roman, Christine Julien, Qingfeng Huang Jan 2001

Network Abstractions For Context-Aware Mobile Computing, Gruia-Catalin Roman, Christine Julien, Qingfeng Huang

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Context-Aware computing is characterized by the ability of a software system to continuously adapt its behavior to a changing environment over which it has little or no control. Previous work along these lines presumed a rather narrow definition of context, one that was centered on resources immediately available to the component in question, e.g., communication bandwidth, physical location, etc. This paper explores context-aware computing in the setting of ad hoc networks consisting of numerous mobile hosts that interact with each other opportunistically via transient wireless interconnections. We extend the context to encompass awareness of an entire neighborhood within the ad …

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Implementation Of An Open Multi-Service Router, Fred Kuhns, John Dehart, Ralph Keller, John Lockwood, Prashanth Papu, Jyoti Parwatikar, Ed Spitznagel, David Richard, David Taylor, Jon Turner, Ken Wong Jan 2001

Implementation Of An Open Multi-Service Router, Fred Kuhns, John Dehart, Ralph Keller, John Lockwood, Prashanth Papu, Jyoti Parwatikar, Ed Spitznagel, David Richard, David Taylor, Jon Turner, Ken Wong

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This paper describes the design, implementation, and performance of an open, high-performance, dynamically reconfigurable Multi-Service Router (MSR) being developed at Washington University in St. Louis. This router provides an experimentation platform for research on protocols, router software, and hardware design, network management, quality of service and advanced applications. The MSR has been designed to be flexible, without sacrificing performance. It support gigabit links and uses a scalable architecture suitable for supporting hundreds or even thousands of links. The MSR's flexibility makes it an ideal platform for experimental research on dynamically extensible networks that implement higher level functions in direct support …

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Efficient Queue Management For Tcp Flows, Anshul Kantawala, Jonathan Turner Jan 2001

Efficient Queue Management For Tcp Flows, Anshul Kantawala, Jonathan Turner

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Packets in the Internet can experience large queueing delays during busy periods. Backbone routers are generally engineered to have large buffers, in which packets may wait as long as half a second (assuming FIFO service, longer otherwise). During congestion periods, these bufferfs may stay close to full, subjecting packets to long delays, even when the intrinsic latency of the path is relatively small. This paper studies the performance improvements that can be obtained by using more sophisticated packet schedulers, than are typical of Internet routers. The results show that the large buffers found in WAN routers ocntribute only marginally to …

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Routing In Overlay Multicast Networks, Sherlia Y. Shi, Jonathan S. Turner Jan 2001

Routing In Overlay Multicast Networks, Sherlia Y. Shi, Jonathan S. Turner

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Multicast servises can be provided either as a basic network service or as an application-layer service. Higher level multicast implementations often provide more sophisticated features, and since they don't require network supoprt for multicast, they can provide multicast services, where no network layer support is available. Overlay multicast networks offer an intermediate option, potentially combining the flexibility and advanced features of application layer multicast with the greater efficiency of network layer multicast. Overlay multicast networks play an important role in the Internet. Indeed, since Internet Service Providers have been slow to enable IP multicast in their networks, Internet multicast is …

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Generalized Rad Module Interface Specification Of The Field-Programmable Port Extender (Fpx) Version 2.0, David E. Taylor, John W. Lockwood, Sarang Dharmapurikar Jan 2001

Generalized Rad Module Interface Specification Of The Field-Programmable Port Extender (Fpx) Version 2.0, David E. Taylor, John W. Lockwood, Sarang Dharmapurikar

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The Field-programmable Port eXtender (FPX) provides dynamic, fast, and flexible mechanisms to process data streams at the ports of the Washington University Gigabit Switch (WUGS-20). By performing all computations in FPGA hardware, cells and packets can be processed at the full line speed of the transmission interface, currently 2.4 Gbits/sec. In order to design and implement portable hardware modules for the Reprogrammable Application Devide (RAD) on the FPX board, all modules should conform to a standard interface. This standard interface specifies how modules receive and transmit ATM cells of data flows, prevent data loss during reconfiguration, and access off-chip memory. …

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Lime: A Middleware For Physical And Logical Mobility, Gian Pietro Picco, Amy L. Murphy, Gruia-Catalin Roman Jan 2000

Lime: A Middleware For Physical And Logical Mobility, Gian Pietro Picco, Amy L. Murphy, Gruia-Catalin Roman

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LIME is a middleware supporting the development of applications that exhibit physical mobility of hosts, logical mobility of agents, or both. LIME adopts a coordination perspective inspired by work on the Linda model. The context for computation, represented in Linda by a globally accessible, persistent tuple space, is represented in LIME by transient sharing of the tuple spaces carried by each individual mobile unit. Linda tuple spaces are also extended with a notion of location and with the ability to react to a given state. The hypothesis underlying our work is that the resulting model provides a minimalist set of …

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A Rate-Based End-To-End Multicast Congestion Control Protocol, Sherlia Shi, Marcel Waldvogel Jan 2000

A Rate-Based End-To-End Multicast Congestion Control Protocol, Sherlia Shi, Marcel Waldvogel

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Current reliable multicast protocols do not have scalable congestion control mechanisms and this deficiency leads to concerns that multicast deployment may endanger stability of the network. In this paper, we present a sender-based approach for multicast congestion control targeted towards reliable bulk data transfer. We assume that there are a few bottleneck links in a large scale multicast group at any time period and these bottlenecks persist long enough to be identified and adapted to. Our work focus on dynamically identifying the worst congested path in the multicast tree and obtaining TCP-friendly throughput on this selected path. We device novel …

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On Maintaining Group Membership Data In Ad Hoc Networks, Gruia-Catalin Roman, Qingfeng Huang, Ali Hazemi Jan 2000

On Maintaining Group Membership Data In Ad Hoc Networks, Gruia-Catalin Roman, Qingfeng Huang, Ali Hazemi

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The design of ad hoc mobile applications often requires the availability of a consistent view of the application state among the participating hosts. Essential to constructing a consistent view is the ability to know what hosts are within proximity of each other, i.e., form a group in support of the particular application. In this paper we propose an algorithm that allows hosts within communication range to maintain a consistent view of the group membership despite movement and frequent disconnections. The novel features of this algorithm are its reliance on location information and a conservative notion of logical connectivity that creates …

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Data Archiving With The Srb*, Jinghua Zhou Jan 2000

Data Archiving With The Srb*, Jinghua Zhou

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We use the SRB (Storage Request Broker) middleware to design and implement a storage archival system which will be used to archive Neuroscience data. As part of the design process, we developed and used an experimenter's workbench to measure SRB performance. These experiments improved our understanding of both the functionality and the performance of the SRB. This technical report describes the scripts in the experimenter's workbench, the archiving scripts, and performance measurements.

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The Design And Performance Of Meta-Programming Mechanisms For Object Request Broker Middleware, Nanbor Wang, Kirthika Parameswaran, Douglass Schmidt Jan 2000

The Design And Performance Of Meta-Programming Mechanisms For Object Request Broker Middleware, Nanbor Wang, Kirthika Parameswaran, Douglass Schmidt

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Distributed object computing (DOC) middleware shields developers from many tedious and error-prone aspects of programming distribued applications. Without proper support from the middleware, however, it can be hard to evolve distributed applications after they are deployed. Therefore, DOC middleware should support meta-programming mechanisms, such as smart proxies and interceptors, that improve the adaptability of distributed applications by allowing their behavior to be modified without drastically changing existing software. This paper presents three contributions to the study of metaprogramming mechanisms for DOC middleware. First, it illustrates, compares, and contrasts several meta-programming mechanisms from an application developer's perspective. Second, it outlines the …

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Synthesizer, A Pattern Language For Designing Digital Modular Synthesis Software, Thomas V. Judkins, Christopher D. Gill Jan 2000

Synthesizer, A Pattern Language For Designing Digital Modular Synthesis Software, Thomas V. Judkins, Christopher D. Gill

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Synthesizer is a pattern language for designing digital synthesizers using modular synthesis in software to generate sound. Software developed according to this pattern language emulates the abilities of an analog synthesizer. Modular synthesis is one of the oldest sound synthesis techniques. It was used in the earliest analog synthesizers, like the Moog [1] and ARP [2]. These machines introduced the oscillator-filter-amplifier paradigm, where sound generated by an oscillator is passed through a series of filters and amplifers before being sent to a speaker. These first machines had physical modules through which electrical signals were passed. These modules can be emulated …

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Programming Active Networks Using Active Pipes, Ralph Keller, Jeyashankher Ramamirtham, Tilman Wolf, Bernhard Plattner Jan 2000

Programming Active Networks Using Active Pipes, Ralph Keller, Jeyashankher Ramamirtham, Tilman Wolf, Bernhard Plattner

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Active networks allow customized processing of data traffic within the network which can be used by applications to improve the quality of their sessions. To simplify development of active applications in a heterogeneous environment, we propose active network pipes as a programming abstraction to specify transmission and processing requirements. We describe a routing algorithm that maps application session requirements onto network resources and determines an optimal route through the network transiting all required processing sites. Additionally, we propose a network software architecture to implement the functionality required to support active pipes.

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Design Tradeoffs For Embedded Network Processors, Tilman Wolf, Mark Franklin, Edward W. Spitznagel Jan 2000

Design Tradeoffs For Embedded Network Processors, Tilman Wolf, Mark Franklin, Edward W. Spitznagel

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Demands for flexible processing has moved general-purpose processing into the data path of networks. With the development of System-On-a-Chip technology, it is possible to put several processors with memory and I/O components on a single ASIC. We present a model of such a system with a simple performance metric and show how the number of processors and cache sizes can be optimized for a given workload. Based on a telecommunications benchmark we show the results of such an optimization and discuss how specialied hardware and appropriate scheduling can further improve system performance.

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Profile-Based Routing: A New Framework For Mpls Traffic Engineering, Subhash Suri, Marcel Waldvogel, Priyank Ramesh Warkhede Jan 2000

Profile-Based Routing: A New Framework For Mpls Traffic Engineering, Subhash Suri, Marcel Waldvogel, Priyank Ramesh Warkhede

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We present a new algorithm and framework for dynamic routing of bandwidth guaranteed flows. The problem is motivated by the need to dynamically set up bandwidth guaranteed paths in carrier and ISP networks. Traditional routing algorithms such as minimum hop routing or widest path routing do not take advantage of any knowledge about the traffic distribution or ingress-egress pairs, and therefore can often lead to severe network underutilization. Our work is inspired by the recently proposed "minimum interference routing" algorithm (MIRA) of Kodialam and Lakshman, but it improves on their approach in several ways. Our main idea is to use …

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Almi: An Application Level Multicast Infrastructure, Dimitrios Pendarakis, Sherlia Shi, Dinesh Verma, Marcel Waldvogel Jan 2000

Almi: An Application Level Multicast Infrastructure, Dimitrios Pendarakis, Sherlia Shi, Dinesh Verma, Marcel Waldvogel

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The IP multicast model allows scalable and efficient multi-party communication, particularly for groups of large size. However, deployment of IP multicast requires substantial infrastructure modifications and is hampered by a host of unresolved open problems such as reliability, flow and congestion control, security and access control. Motivated by these problems, we have designed and implemented ALMI, an application level group communication middleware, which does not rely on network infrastructure support and thus, allows accelerated deployment and simplified configuration at the cost of a relatively small increase in traffic load. ALMI is tailored toward support of multicast groups of relatively small …

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Parallel Fpga Programming Over Backplane Chassis, John Lockwood, Tom Mclaughlin, Tom Chaney, Yuhua Chen, Fred Rosenberger, Alex Chandra, Jon Turner Jan 2000

Parallel Fpga Programming Over Backplane Chassis, John Lockwood, Tom Mclaughlin, Tom Chaney, Yuhua Chen, Fred Rosenberger, Alex Chandra, Jon Turner

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For systems with a large number of FPGAs, where a design is instantiated across multiple FPGAs in a chassis, an efficient mechanism of programming the FPGA devices is needed. The mechanism described herein allows multiple FPGAs to be programmed across a backplane. Only a single configuration PROM is required to store the configuration for the multiple instances of the design. When the system boots, all FPGAs are programmed in parallel. This design is applicable to any system which contains a multiple board system which has instances of identical FPGA implementations distributed across the boards. Signal integrity of signals is considered.

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Codeweave: Exploring Fine-Grained Mobility Of Code, Cecilia Mascolo, Gian Pietro Picco, Gruia-Catalin Roman Jan 2000

Codeweave: Exploring Fine-Grained Mobility Of Code, Cecilia Mascolo, Gian Pietro Picco, Gruia-Catalin Roman

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This paper explores the range of constructs and issues facing the designer of mobile code systems which allow for the unit of mobility to be finer-grained than that of execution. Mobile UNITY, a notation and proof logic for mobile computing, provides for this research a clean abstract setting, i.e., unconstrained by compilation and performance considerations traditionally associated with programming language design. Within the context of Mobile UNITY, we take the extreme view that every line of code and every variable declaration is potentially mobile, i.e., it may be duplicated and/or moved from one program contxt to another on the same …

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Configuring Sessions In Programmable Networks, Sumi Choi, Jonathan Turner, Tilman Wolf Jan 2000

Configuring Sessions In Programmable Networks, Sumi Choi, Jonathan Turner, Tilman Wolf

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The provision of advanced computational services within networks is rapidly becoming both feasible and economical. We present a general approach to the problem of configuring application sessions that require intermediate processing by showing how the session configuration problem can be transformed to a conventional shortest path problem. We show, through a series of examples, that the method can be applied to a wide variety of different situations.

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Plugin Management For Active Network, Sumi Y. Choi Jan 2000

Plugin Management For Active Network, Sumi Y. Choi

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The purpose of this document is to present the overview of tte plugin management architecture and the description of the software developed for the scalable, high performance active network node project in Washington University, St. Louis. The plugin management is a user space daemon program that runs at the code(plugin) server and at the active network component of a router or a switch port processor. The running programs cooperate to load plugins from the code server to the active network component. This software is intended to be used among multiple platforms.

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Hello, World: A Simple Application For The Field Programmable Port Extender (Fpx), John Lockwood, David Lim Jan 2000

Hello, World: A Simple Application For The Field Programmable Port Extender (Fpx), John Lockwood, David Lim

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The FPX provides simple and fast mechanisms to process cells or packets. By performing all computations in FPGA hardware, cells and packets can be processing at the full line speed of the card [currently 2.4 Gbits/sec]. A sample application, called 'Hello World' has been developed that illustrates how easily an application can be implemented on the FPX. This application uses the FPGA hardware to search for a string on a particular flow and selectively replace contents of the payload. The resulting circuit operates at 119 MHz on a Xilinx XCV 1000E-FG680-7, and occupies less than 1% of the available gates …

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Coordination And Mobility, Gruia-Catalin Roman, Amy L. Murphy, Gian Pietro Picco Jan 2000

Coordination And Mobility, Gruia-Catalin Roman, Amy L. Murphy, Gian Pietro Picco

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Mobility entails the study of systems in which components change location, in a voluntary or involuntary manner, and move across a space that may be defined to be either logical or physical. Coordination is concerned with what happens when two or more components come in contact with each other. In this paper we put forth a working definition of coordinatoin, we construct argumetns that demonstrate that coordination is central to understanding mobility, we explore the intellectual richness of the notion of coordination, and we consider the practical implications of coordination-centered system design strategies. We develop these ideas in two steps. …

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