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Electrical and Computer Engineering
Electrical and Computer Engineering Faculty Research & Creative Works
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Full-Text Articles in Engineering
Quantifying Smt Decoupling Capacitor Placement In Dc Power-Bus Design For Multilayer Pcbs, Jun Fan, James L. Drewniak, James L. Knighten, Norman W. Smith, Antonio Orlandi, Thomas Van Doren, Todd H. Hubing, Richard E. Dubroff
Quantifying Smt Decoupling Capacitor Placement In Dc Power-Bus Design For Multilayer Pcbs, Jun Fan, James L. Drewniak, James L. Knighten, Norman W. Smith, Antonio Orlandi, Thomas Van Doren, Todd H. Hubing, Richard E. Dubroff
Electrical and Computer Engineering Faculty Research & Creative Works
Noise on a dc power-bus that results from device switching, as well as other potential mechanisms, is a primary source of many signal integrity (SI) and electromagnetic interference (EMI) problems. Surface mount technology (SMT) decoupling capacitors are commonly used to mitigate this power-bus noise. A critical design issue associated with this common practice in high-speed digital designs is placement of the capacitors with respect to the integrated circuits (ICs). Local decoupling, namely, placing SMT capacitors in proximity to ICs, is investigated in this study. Multilayer PCB designs that employ entire layers or area fills for power and ground in a …
Representation Of Gyromagnetic Composite Media For Fdtd Modeling, Marina Koledintseva, James L. Drewniak, Xiaoning Ye
Representation Of Gyromagnetic Composite Media For Fdtd Modeling, Marina Koledintseva, James L. Drewniak, Xiaoning Ye
Electrical and Computer Engineering Faculty Research & Creative Works
A composite media containing particles with a high internal field of magnetic anisotropy (hexagonal ferrites) useful for numerous EMC applications in a wide frequency band is considered. Effective constitutive parameters of a high-loss composite gyromagnetic media are represented in the Lorentzian form. It is convenient for the numerical analysis using the finite-difference time-domain (FDTD) algorithm with a recursive convolution procedure. The equations for the electric and magnetic field updating in such media are represented.
Including Smt Ferrite Beads In Dc Power Bus And High-Speed I/O Line Modeling, Jun Fan, Shaofeng Luan, James L. Drewniak
Including Smt Ferrite Beads In Dc Power Bus And High-Speed I/O Line Modeling, Jun Fan, Shaofeng Luan, James L. Drewniak
Electrical and Computer Engineering Faculty Research & Creative Works
Surface mount technology (SMT) ferrite beads are often used in high-speed digital circuit designs to mitigate noise. The common modeling approach is to include SMT ferrite beads as equivalent lumped LCR circuits. The work presented in this paper included SMT ferrite beads as a frequency-dependent impedance in a PEEC-like modeling tool denoted CEMPIE, a circuit extraction approach based on a mixed-potential integral equation formulation. Agreement with measurements demonstrates the approach. The applications shown are segmentation of power areas for noise isolation, and I/O line filtering.
Mitigating Power Bus Noise With Embedded Capacitance In Pcb Designs, Minjia Xu, Todd H. Hubing, Juan Chen, James L. Drewniak, Thomas Van Doren, Richard E. Dubroff
Mitigating Power Bus Noise With Embedded Capacitance In Pcb Designs, Minjia Xu, Todd H. Hubing, Juan Chen, James L. Drewniak, Thomas Van Doren, Richard E. Dubroff
Electrical and Computer Engineering Faculty Research & Creative Works
This paper investigates the power bus noise and power bus impedance of printed circuit boards with four different kinds of embedded capacitance. These boards have power-ground plane pairs separated by a very thin layer of material with high dielectric permittivity. It is shown that embedded capacitance effectively reduces power bus noise over the entire frequency range evaluated (up to 5 GHz).
Investigation Of Pcb Layout Parasitics In Emi Filtering Of I/O Lines, Xiaoning Ye, Geping Liu, James L. Drewniak
Investigation Of Pcb Layout Parasitics In Emi Filtering Of I/O Lines, Xiaoning Ye, Geping Liu, James L. Drewniak
Electrical and Computer Engineering Faculty Research & Creative Works
EMI filters are often utilized on I/O lines to reduce high-frequency noise from being conducted or coupled off the PCB and resulting in an EMI problem. However, layout parasitics are usually inevitable in practical circuit design, and the filtering performance may vary. In this study, the impact of the board layout on the filtering performance is investigated by |S21| measurements of sample PCB boards with different filter layouts. The finite-difference time-domain method is applied to model the boards, support the experimental work, and can be used to provide a means for conducting "what-if" engineering studies.
Challenge Problem Update: Peec And Mom Analysis Of A Pc Board With Long Wires Attached, H. Wang, Todd H. Hubing, Bruce Archambeault
Challenge Problem Update: Peec And Mom Analysis Of A Pc Board With Long Wires Attached, H. Wang, Todd H. Hubing, Bruce Archambeault
Electrical and Computer Engineering Faculty Research & Creative Works
At the 2000 IEEE International Symposium on EMC, a paper was presented by Y. Ji et al. (paper appears in 2001 proceedings) that compared the application of PEEC and MOM techniques to the analysis of one of the EMC Society/Applied Computational Electromagnetics Society special challenge problems. Good agreement was obtained between the two codes at 2 out of the 3 measurement ports. At that time, no definite explanation was provided for the discrepancy at the third port. This paper shows that the problem was (at least partly) related to assumptions made about the signal source
Applying The Method Of Moments And The Partial Element Equivalent Circuit Modeling Techniques To A Special Challenge Problem Of A Pc Board With Long Wires Attached, Yun Ji, Bruce Archambeault, Todd H. Hubing
Applying The Method Of Moments And The Partial Element Equivalent Circuit Modeling Techniques To A Special Challenge Problem Of A Pc Board With Long Wires Attached, Yun Ji, Bruce Archambeault, Todd H. Hubing
Electrical and Computer Engineering Faculty Research & Creative Works
This paper investigates a canonical printed circuit board (PCB) problem using both a method of moments (MoM) and a partial element equivalent circuit (PEEC) modeling technique. The problem consists of a PCB populated with three traces. One trace is a signal line and the other two are I/O lines that couple to the signal line and extend beyond the boundary of the board. Although the MoM code was a frequency domain code and the PEEC code was a time-domain code, good agreement was achieved in both the time-domain and the frequency-domain
20-H Rule Modeling And Measurements, Todd H. Hubing, Hwan-Woo Shim
20-H Rule Modeling And Measurements, Todd H. Hubing, Hwan-Woo Shim
Electrical and Computer Engineering Faculty Research & Creative Works
The 20-H rule is a printed circuit board layout guideline. On boards with power and ground planes, the fringing field at the edges of the board is contained by backing the edge of the power plane away from the edge of the board by a distance equal to 20 times the separation distance between the planes. In this study, test boards were built and measured with and without implementing the 20-H rule. The measured results are compared to numerical models. The results of this study show that, although the near fields are more contained, the radiation from a board implementing …