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Electrical and Computer Engineering

Virginia Commonwealth University

FPGA

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Full-Text Articles in Engineering

Gnu Radio Companion (Grc) On Software Defined Radio Platforms, Jacob Ramey, James Begemann, Richard Hite Jan 2016

Gnu Radio Companion (Grc) On Software Defined Radio Platforms, Jacob Ramey, James Begemann, Richard Hite

Capstone Design Expo Posters

Software defined radio (SDR) is a method to design radio frequency (RF) signal systems using software to implement radio components that are normally implemented in hardware. Several examples of components that can be designed in SDR include RF signal filters, signal amplifiers, and signal resamplers. SDR applications include amateur radio transmission, aircraft and ship tracking, RF communications, and radio astronomy, to name a few. A great advantage of implementing a RF system in software is that the system developed in software is more flexible and upgradeable than a system designed with hardware alone.

QRC Technologies offers a wide range of …


An Efficient Implementation Of An Exponential Random Number Generator In A Field Programmable Gate Array (Fpga), Smitha Gautham Apr 2010

An Efficient Implementation Of An Exponential Random Number Generator In A Field Programmable Gate Array (Fpga), Smitha Gautham

Theses and Dissertations

Many physical, biological, ecological and behavioral events occur at times and rates that are exponentially distributed. Modeling these systems requires simulators that can accurately generate a large quantity of exponentially distributed random numbers, which is a computationally intensive task. To improve the performance of these simulators, one approach is to move portions of the computationally inefficient simulation tasks from software to custom hardware implemented in Field Programmable Gate Arrays (FPGAs). In this work, we study efficient FPGA implementations of exponentially distributed random number generators to improve simulator performance. Our approach is to generate uniformly distributed random numbers using standard techniques …


Efficient Implementation Of Raid-6 Encoding And Decoding On A Field Programmable Gate Array (Fpga), David Jacob Dec 2009

Efficient Implementation Of Raid-6 Encoding And Decoding On A Field Programmable Gate Array (Fpga), David Jacob

Theses and Dissertations

RAID-6 is a data encoding scheme used to provide single drive error detection and dual drive error correction for data redundancy on an array of disks. Here we present a thorough study of efficient implementations of RAID-6 on field programmable gate arrays (FPGAs). Since RAID-6 relies heavily on Galois Field Algebra (GFA), an efficient implementation of a GFA FPGA library is also presented. Through rigorous performance analysis, this work shows the most efficient ways to tradeoff FPGA resources and execution time when implementing GFA functions as well as RAID-6 encoding and decoding.