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Full-Text Articles in Nanoscience and Nanotechnology

Exploring Gated Nanoelectronic Devices Fabricated From 1d And 2d Materials, Prathamesh A. Dhakras Jan 2019

Exploring Gated Nanoelectronic Devices Fabricated From 1d And 2d Materials, Prathamesh A. Dhakras

Legacy Theses & Dissertations (2009 - 2024)

One and two dimensional materials are being extensively researched toward potential application as ultra-thin body channel materials. The difficulty of implementing physical doping methods in these materials has necessitated various alternative doping schemes, the most promising of which is the electrostatic gating technique due to its reconfigurability. This dissertation explores the different fundamental devices that can be fabricated and characterized by taking advantage of the electrostatic gating of individual single-walled carbon nanotubes (SWNTs), dense SWNT networks and exfoliated 2D tungsten diselenide (WSe2) flakes.


Cvd Molybdenum Disulfide : Material And Device Engineering, Eui Sang Song Jan 2019

Cvd Molybdenum Disulfide : Material And Device Engineering, Eui Sang Song

Legacy Theses & Dissertations (2009 - 2024)

Molybdenum disulfide (MoS2) is a semiconducting 2D layered material that has attracted a lot of attention due to its material properties for electronics and optoelectronics device applications. These include a layer-dependent band gap, an indirect to direct energy transition at monolayer state, and strong light-matter interaction. A large majority of 2D materials and devices have been studied through micromechanical exfoliation for extraction and electron beam lithography for device fabrication. These methodologies while able to generate high quality materials and precisely fabricated devices, are not suitable for large scale production. Efforts have been made to make MoS2 and other 2D materials …


Development And Demonstration Of A Processing And Assembly Pathway For A 3d-Synchronous Field Programmable Gate Array, Robert Carroll Jan 2019

Development And Demonstration Of A Processing And Assembly Pathway For A 3d-Synchronous Field Programmable Gate Array, Robert Carroll

Legacy Theses & Dissertations (2009 - 2024)

Field Programmable Gate Arrays (FPGA) are integrated circuits which can implement virtually any digital function and can be configured by a designer after manufacturing. This is beneficial when dedicated application specific runs are not time or cost effective; however, this flexibility comes at the cost of a substantially higher interconnect overhead. Three-dimensional (3D) integration can offer significant improvements in the FPGA architecture by stacking multiple device layers and interconnecting them in the third or vertical dimension, through the substrate, where path lengths are greatly reduced. This will allow for a higher density of devices and improvements in power consumption, signal …


Effect Of Ion Flux (Dose Rate) In Source-Drain Extension Ion Implantation For 10-Nm Node Finfet And Beyond On 300/450mm Platforms, Ming-Yi Shen Jan 2017

Effect Of Ion Flux (Dose Rate) In Source-Drain Extension Ion Implantation For 10-Nm Node Finfet And Beyond On 300/450mm Platforms, Ming-Yi Shen

Legacy Theses & Dissertations (2009 - 2024)

The improvement of wafer equipment productivity has been a continuous effort of the semiconductor industry. Higher productivity implies lower product price, which economically drives more demand from the market. This is desired by the semiconductor manufacturing industry. By raising the ion beam current of the ion implanter for 300/450mm platforms, it is possible to increase the throughput of the ion implanter. The resulting dose rate can be comparable to the performance of conventional ion implanters or higher, depending on beam current and beam size. Thus, effects caused by higher dose rate must be investigated further. One of the major applications …


Implementation Of Strategies To Improve The Reliability Of Iii-Nitride Photodetectors Towards The Realization Of Visible And Solar-Blind Imaging Arrays, John Bulmer Jan 2015

Implementation Of Strategies To Improve The Reliability Of Iii-Nitride Photodetectors Towards The Realization Of Visible And Solar-Blind Imaging Arrays, John Bulmer

Legacy Theses & Dissertations (2009 - 2024)

Ultraviolet (UV) radiation detectors are being heavily researched for applications in non-line-of-sight (NLOS) communication systems, flame monitoring, biological detection, and astronomical studies. These applications are currently being met by the use of Si-based photomultiplier tubes (PMTs), which are bulky, fragile, expensive and require the use of external filters to achieve true visible-blind and solar-blind operation.


Extraction Of Carrier Mobility And Interface Trap Density In Ingaas Metal Oxide Semiconductor Structures Using Gated Hall Method, Thenappan Chidambaram Jan 2015

Extraction Of Carrier Mobility And Interface Trap Density In Ingaas Metal Oxide Semiconductor Structures Using Gated Hall Method, Thenappan Chidambaram

Legacy Theses & Dissertations (2009 - 2024)

III-V semiconductors are potential candidates to replace Si as a channel material in next generation CMOS integrated circuits owing to their superior carrier mobilities. Low density of states (DOS) and typically high interface and border trap densities (Dit) in high mobility group III-V semiconductors provide difficulties in quantification of Dit near the conduction band edge. The trap response above the threshold voltage of a MOSFET can be very fast, and conventional Dit extraction methods, based on capacitance/conductance response (CV methods) of MOS capacitors at frequencies <1MHz, cannot distinguish conducting and trapped carriers. In addition, the CV methods have to deal with high dispersion in the accumulation region that makes it a difficult task to measure the true oxide capacitance, Cox value. Another implication of these properties of III-V interfaces is an ambiguity of determination of electron density in the MOSFET channel. Traditional evaluation of carrier density by integration of the C-V curve, gives incorrect values for Dit and mobility. Here we employ gated Hall method to quantify the Dit spectrum at the high-κ oxide/III-V semiconductor interface for buried and surface channel devices using Hall measurement and capacitance-voltage data. Determination of electron density directly from Hall measurements allows for obtaining true mobility values


Carbon 1d/2d Nanoelectronics : Integration And Device Applications, Zhaoying Hu Jan 2015

Carbon 1d/2d Nanoelectronics : Integration And Device Applications, Zhaoying Hu

Legacy Theses & Dissertations (2009 - 2024)

Graphene is a one-atom thick planar monolayer of sp2-bonded carbon atoms organized in a hexagonal crystal lattice. A single walled carbon nanotube (CNT) can be thought of as a graphene sheet rolled up into a seamless hollow cylinder with extremely high length-to-diameter ratio. Their ultra-thin body, large surface area, and exceptional electronic, optical and mechanical properties make these low-dimensional carbon materials ideal candidates for electronic applications. However, adopting low-dimensional carbon materials into semiconductor industry faces significant material and integration challenges. There is an urgent need for research at fundamental and applicative levels to find a roadmap for carbon nanomaterial to …


High Frequency Signal Transmission In Through Silicon Via Based 3d Integrated Circuit, Min Xu Jan 2015

High Frequency Signal Transmission In Through Silicon Via Based 3d Integrated Circuit, Min Xu

Legacy Theses & Dissertations (2009 - 2024)

Through silicon vias (TSVs) enable 3-dimensional (3D) integrated circuits (ICs), which have the potential to reduce the power consumption, interconnect length and overall communication latency in modern nanoelectronics systems. High-speed signal transmission channels through stacked silicon substrates are critical for 3D heterogeneous integration. This work presents systematic analyses of fabricated 3D IC test structures. This includes test structure design, fabrication, experimental characterization, equivalent circuit modeling and full wave simulations for high-speed signal transmission of the TSV based 3D IC channels.


Development Of Novel Technologies To Enhance Performance And Reliability Of Iii-Nitride Avalanche Photodiodes, Puneet Harischandra Suvarna Jan 2014

Development Of Novel Technologies To Enhance Performance And Reliability Of Iii-Nitride Avalanche Photodiodes, Puneet Harischandra Suvarna

Legacy Theses & Dissertations (2009 - 2024)

Solar-blind ultraviolet avalanche photodiodes are an enabling technology for applications in the fields of astronomy, communication, missile warning systems, biological agent detection and particle physics research. Avalanche photodiodes (APDs) are capable of detecting low-intensity light with high quantum efficiency and signal-to-noise ratio without the need for external amplification. The properties of III-N materials (GaN and AlGaN) are promising for UV photodetectors that are highly efficient, radiation-hard and capable of visible-blind or solar-blind operation without the need for external filters. However, the realization of reliable and high performance III-N APDs and imaging arrays has several technological challenges. The high price and …


Investigation Of Hfox/Cu Resistive Memory For Advanced Encryption Applications, Benjamin David Briggs Jan 2014

Investigation Of Hfox/Cu Resistive Memory For Advanced Encryption Applications, Benjamin David Briggs

Legacy Theses & Dissertations (2009 - 2024)

The Advanced Encryption Standard (AES) is a widely used encryption algorithm to protect data and communications in today's digital age. Modern AES CMOS implementations require large amounts of dedicated logic and must be tuned for either performance or power consumption. A high throughput, low power, and low die area AES implementation is required in the growing mobile sector. An emerging non-volatile memory device known as resistive memory (ReRAM) is a simple metal-insulator-metal capacitor device structure with the ability to switch between two stable resistance states. Currently, ReRAM is targeted as a non-volatile memory replacement technology to eventually replace flash. Its …


Development Of A One-Dimensional Position Sensitive Detector For Tracking Applications, Leigh Kent Lydecker Jan 2014

Development Of A One-Dimensional Position Sensitive Detector For Tracking Applications, Leigh Kent Lydecker

Legacy Theses & Dissertations (2009 - 2024)

Optical Position Sensitive Detectors (PSDs) are a non-contact method of tracking the location of a light spot. Silicon-based versions of such sensors are fabricated with standard CMOS processing, are inexpensive and provide a real-time, analog signal output corresponding to the position of the light spot. Because they are non-contact, they do not degrade over time from surface friction due to repetitive sliding motion associated with standard full contact sliding potentiometers. This results in long, reliable device lifetimes. In this work, an innovative PSD was developed to replace the linear hard contact potentiometer currently being used in a human-computer interface architecture.


Properties Of Peg, Ppg And Their Copolymers Influence On The Gap-Fill Characteristics Of Damascene Interconnects, Kevin Ryan Jan 2013

Properties Of Peg, Ppg And Their Copolymers Influence On The Gap-Fill Characteristics Of Damascene Interconnects, Kevin Ryan

Legacy Theses & Dissertations (2009 - 2024)

A laboratory scale plating cell was built that provided reproducible bottom-up fill results for the electrochemical deposition of copper in damascene features. Several techniques used in the full wafer plating tool were incorporated into the setup to accurately control the process conditions. These techniques included but were not limited to a voltage controlled `hot-entry' step, a custom coupon holder to allow sample rotation, a secondary thief electrode and an automatic entry system. The results of qualification experiments are presented to demonstrate that precise control was realized along with repeatable partial fill plating results. The qualified setup was then used to …


Development Of Iii-V P-Mosfets With High-Kappa Gate Stack For Future Cmos Applications, Padmaja Nagaiah Jan 2012

Development Of Iii-V P-Mosfets With High-Kappa Gate Stack For Future Cmos Applications, Padmaja Nagaiah

Legacy Theses & Dissertations (2009 - 2024)

As the semiconductor industry approaches the limits of traditional silicon CMOS scaling, non-silicon materials and new device architectures are gradually being introduced to improve Si integrated circuit performance and continue transistor scaling. Recently, the replacement of SiO2 with a high-k material (HfO2) as gate dielectric has essentially removed one of the biggest advantages of Si as channel material. As a result, alternate high mobility materials are being considered to replace Si in the channel to achieve higher drive currents and switching speeds. III-V materials in particular have become of great interest as channel materials, owing to their superior electron transport …


Graphene-Based Post-Cmos Architecture, Sansiri Tanachutiwat Jan 2012

Graphene-Based Post-Cmos Architecture, Sansiri Tanachutiwat

Legacy Theses & Dissertations (2009 - 2024)

The semiconductor industry relies on CMOS technology which is nearing its scaling limitations. In order to continue the historical growth rate of the device density of digital logic chips, novel nanomaterials and nanodevices will need to be developed.


Energy Band Engineering Using Polarization Induced Interface Charges In Mocvd Grown Iii-Nitride Heterojunction Devices, Neeraj Tripathi Jan 2011

Energy Band Engineering Using Polarization Induced Interface Charges In Mocvd Grown Iii-Nitride Heterojunction Devices, Neeraj Tripathi

Legacy Theses & Dissertations (2009 - 2024)

Characteristics of III-nitride based heterojunction devices are greatly influenced by the presence of high density of polarization induced interface charges. Research undertaken in the current doctoral thesis demonstrates the effect of presence of one, three and six sheets of polarization induced charges in three different III-nitride based devices, namely in a photocathode, a high electron mobility transistor (HEMT) and a hyperspectral detector structure. Through a systematic set of experiments and theoretical modeling an in-depth study of the interaction between multiple sheets of polarization induced charges and their impact on energy band profile was undertaken. Various device designs were studied and …


Synthesis, Processing And Characterization Of Silicon-Based Templated Nanowires, Jae Ho Lee Jan 2011

Synthesis, Processing And Characterization Of Silicon-Based Templated Nanowires, Jae Ho Lee

Legacy Theses & Dissertations (2009 - 2024)

Semiconductor and metallic nanowires have attracted substantial attention due to their wide variety of applications, ranging from nanoelectronics to energy storage devices. In particular, self-assembled silicon nanowires (SiNWs) may be an attractive alternative to conventionally processed planar silicon since SiNWs can potentially function as both the switch (i.e. transistor) and local interconnect (e.g. metal silicide nanowire) to form an inherently integrated nanoelectronic system. Also, hierarchical (branched) nanowire systems hold potential for catalysts or porous electrode applications for energy applications


A Study Of Reticle Non-Flatness Induced Image Placement Error In Extreme Ultraviolet Lithography, Sudharshanan Raghunathan Jan 2010

A Study Of Reticle Non-Flatness Induced Image Placement Error In Extreme Ultraviolet Lithography, Sudharshanan Raghunathan

Legacy Theses & Dissertations (2009 - 2024)

As the semiconductor industry continues scaling devices to smaller sizes, the need for next generation lithography technology for fabricating these small structures has always been at the forefront. Over the past few years, conventional optical lithography technology which has adopted a series of resolution enhancement techniques to support the scaling needs is expected to run out of steam in the near future. Extreme Ultra Violet lithography (EUVL) is being actively pursued by the semiconductor industry as one of the most promising next generation lithographic technologies. Most of the issues unique to EUVL arise from the use of 13.5 nm light …


A Study Of Cantilever-Free Instrumentation For Nanoscale Magnetic Measurements, Bruce Adair Altemus Jan 2009

A Study Of Cantilever-Free Instrumentation For Nanoscale Magnetic Measurements, Bruce Adair Altemus

Legacy Theses & Dissertations (2009 - 2024)

The evolution of the Atomic Force Microscope (AFM) into the Magnetic Force Microscope (MFM) and Magnetic Resonance Force Microscope (MRFM) has had a substantial impact on the characterization of nanoscale phenomena. Detection of 10-17 Newtons per root Hertz has occurred with use of an ultra-sensitive cantilever along with optical interferometry methods within these geometries. The sensitivity of these platforms is dependent on the characteristics of the cantilever, where increased length and a low Young's modulus increase the force sensitivity (meters/Newtons). Using IC fabrication techniques, the realization of generating cantilevers with this sensitivity is feasible, but stress compensation layers are required …