Open Access. Powered by Scholars. Published by Universities.®
Electrical and Computer Engineering Commons™
Open Access. Powered by Scholars. Published by Universities.®
Articles 1 - 5 of 5
Full-Text Articles in Electrical and Computer Engineering
Quantifying The Effects On Emi And Si Of Source Imbalances In Differential Signaling, Chen Wang, James L. Drewniak
Quantifying The Effects On Emi And Si Of Source Imbalances In Differential Signaling, Chen Wang, James L. Drewniak
Electrical and Computer Engineering Faculty Research & Creative Works
Imbalances in differential signaling can introduce common-mode components, resulting in signal integrity (SI) problems as well as EMI problems. Three-port mixed-mode S-parameters are employed to quantify the impacts on EMI. The EMI problems caused by delay skew and slew rate skew are investigated.
Memory Dimm Dc Power Distribution Analysis And Design, Jingkun Mao, Chen Wang, Giuseppe Selli, Bruce Archambeault, James L. Drewniak
Memory Dimm Dc Power Distribution Analysis And Design, Jingkun Mao, Chen Wang, Giuseppe Selli, Bruce Archambeault, James L. Drewniak
Electrical and Computer Engineering Faculty Research & Creative Works
DC power bus design is critical in meeting signal integrity (SI) and electromagnetic compatibility (EMC) requirements. A suitable modeling tool is beneficial to evaluate power bus design and develop design guidelines. This paper discusses difficulties met in evaluating the power distribution design on a dual inline memory module (DIMM) board, such as a power bus with arbitrary shape, parasitic inductance associated with vias, and so on. Moreover, some solutions are given in this paper. A simple cavity model with a segmentation method was employed to model a power bus with irregular shapes. The partial element equivalent circuit (PEEC) technique was …
Lumped-Circuit Model Extraction For Vias In Multilayer Substrates, Jun Fan, James L. Drewniak, James L. Knighten
Lumped-Circuit Model Extraction For Vias In Multilayer Substrates, Jun Fan, James L. Drewniak, James L. Knighten
Electrical and Computer Engineering Faculty Research & Creative Works
Via interconnects in multilayer substrates, such as chip scale packaging, ball grid arrays, multichip modules, and printed circuit boards (PCB) can critically impact system performance. Lumped-circuit models for vias are usually established from their geometries to better understand the physics. This paper presents a procedure to extract these element values from a partial element equivalent circuit type method, denoted by CEMPIE. With a known physics-based circuit prototype, this approach calculates the element values from an extensive circuit net extracted by the CEMPIE method. Via inductances in a PCB power bus, including mutual inductances if multiple vias are present, are extracted …
Analysis Of Simple Two-Capacitor Low-Pass Filters, Todd H. Hubing, David Pommerenke, Theodore M. Zeeff, Thomas Van Doren
Analysis Of Simple Two-Capacitor Low-Pass Filters, Todd H. Hubing, David Pommerenke, Theodore M. Zeeff, Thomas Van Doren
Electrical and Computer Engineering Faculty Research & Creative Works
The performance of typical low-pass capacitor filters is limited by the mutual inductance between the input and output sides of the filter. This paper describes how two appropriately spaced capacitors can be used to construct a low-pass filter with significantly better high-frequency performance than a one-capacitor filter. Laboratory measurements and numerical simulations are used to quantify the mutual inductance and compare the performance of one- and two-capacitor low-pass filters.
Application Of The Cavity Model To Lossy Power-Return Plane Structures In Printed Circuit Boards, Minjia Xu, Hao Wang, Todd H. Hubing
Application Of The Cavity Model To Lossy Power-Return Plane Structures In Printed Circuit Boards, Minjia Xu, Hao Wang, Todd H. Hubing
Electrical and Computer Engineering Faculty Research & Creative Works
Power-return plane pairs in printed circuit boards are often modeled as resonant cavities. Cavity models can be used to calculate transfer impedance parameters used to predict levels of power bus noise. Techniques for applying the cavity model to lossy printed circuit board geometries rely on a low-loss assumption in their derivations. Boards that have been designed to damp power bus resonances (e.g., boards with embedded capacitance) generally violate this low-loss assumption. This paper investigates the validity of the cavity model when applied to printed circuit board structures where the board resonances are significantly damped. Cavity modeling results for sample lossy …