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Electrical and Computer Engineering Commons™
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Full-Text Articles in Electrical and Computer Engineering
Low Cost Dynamic Architecture Adaptation Schemes For Drowsy Cache Management, Nitin Prakash
Low Cost Dynamic Architecture Adaptation Schemes For Drowsy Cache Management, Nitin Prakash
Masters Theses 1911 - February 2014
Energy consumption and speed of execution have long been recognized as conflicting requirements for processor design. In this work, we have developed a low-cost dynamic architecture adaptation scheme to save leakage power in caches. This design uses voltage scaling to implement drowsy caches. The importance of a dynamic scheme for managing drowsy caches, arises from the fact that not only does cache behavior change from one application to the next, but also during different phases of execution within the same application. We discuss various implementations of our scheme that provide a tradeoff between granularity of control and design complexity. …
Design Of An Open-Source Sata Core For Virtex-4 Fpgas, Cory Gorman
Design Of An Open-Source Sata Core For Virtex-4 Fpgas, Cory Gorman
Masters Theses 1911 - February 2014
Many hard drives manufactured today use the Serial ATA (SATA) protocol to communicate with the host machine, typically a PC. SATA is a much faster and much more robust protocol than its predecessor, ATA (also referred to as Parallel ATA or IDE). Many hardware designs, including those using Field-Programmable Gate Arrays (FPGAs), have a need for a long-term storage solution, and a hard drive would be ideal. One such design is the high-speed Data Acquisition System (DAS) created for the NASA Surface Water and Ocean Topography mission. This system utilizes a Xilinx Virtex-4 FPGA. Although the DAS includes a SATA …
Application Specific Customization And Scalability Of Soft Multiprocessors, Deepak C. Unnikrishnan
Application Specific Customization And Scalability Of Soft Multiprocessors, Deepak C. Unnikrishnan
Masters Theses 1911 - February 2014
Soft multiprocessor systems exploit the plentiful computational resources available in field programmable devices. By virtue of their adaptability and ability to support coarse grained parallelism, they serve as excellent platforms for rapid prototyping and design space exploration of embedded multiprocessor applications. As complex applications emerge, careful mapping, processor and interconnect customization are critical to the overall performance of the multiprocessor system. In this thesis, we have developed an automated scalable framework to efficiently map applications written in a high-level programmer-friendly language to customizable soft-cores. The framework allows the user to specify the application in a high-level language called Streamit. After …