Computer Engineering Commons^™

Behavioral Modeling And Fpga Synthesis Of Ieee 802.11n Orthogonal Frequency Division Multiplexing (Ofdm) Scheme, Ragahv Sharma

USF Tampa Graduate Theses and Dissertations

In the field of communications, a high data rate and low multi-path fading is required for efficient information exchange. Orthogonal Frequency Division Multiplexing (OFDM) is a widely accepted IEEE 802.11n (and many others) standard for usage in communication systems operating in fading dispersive channels. In this thesis, we modeled the OFDM algorithm at the behavioral level in VHDL/Verilog that was successfully synthesized/verified on an FPGA. Due to rapid technology scaling, FPGAs have become popular and are low-cost and high performance alternatives to (semi-) custom ASICs. Further, due to reprogramming flexibility, FPGAs are useful in rapid prototyping. As per the IEEE …

Threshold Voltage Defined Switches And Gates To Prevent Reverse Engineering, Ithihasa Reddy Nirmala

USF Tampa Graduate Theses and Dissertations

¹Semiconductor supply chain is increasingly getting exposed to variety of security attacks such as Trojan insertion, cloning, counterfeiting, reverse engineering (RE), piracy of Intellectual Property (IP) or Integrated Circuit (IC) and side-channel analysis due to involvement of untrusted parties. In this thesis, we use threshold voltage-defined switches to design a logic gate that will camouflage the conventional logic gates both logically and physically to resist RE and IP piracy. The proposed gate can function as NAND, AND, NOR, OR, XOR, and XNOR robustly using threshold defined switches. We also propose a flavor of camouflaged gate that represents reduced functionality …

Methodologies To Exploit Atpg Tools For De-Camouflaging, Deepak Reddy Vontela

USF Tampa Graduate Theses and Dissertations

Semiconductor supply chain is increasingly getting exposed to Reverse Engineering (RE) of Intellectual Property (IP). Camouflaging of gates in integrated circuits are typically employed to hide the gate functionality to prevent reverse engineering. The functionalities of these gates cannot be found by De-layering as they don’t leave any layout clues. Adversaries perform reverse engineering by replacing the camouflaged gate with the known gate and by developing custom software to determine test patterns. These test patterns are used to analyze the outputs and to conclude the functionality of the camouflaged gate.

In this thesis, we show that reverse engineering of camouflaged …

Protocol Guided Trace Analysis For Post-Silicon Debug Under Limited Observability, Yuting Cao Cao

USF Tampa Graduate Theses and Dissertations

This thesis considers the problem of reconstructing system level behavior of an SoC design from a partially observed signal trace. Solving this problem is a critical activity in post-silicon validation, and currently depends primarily on human creativity and insights. In this thesis, we provide algorithms to automatically infer system level flows from incomplete, ambiguous, and noisy trace data. This thesis also demonstrates the approach on two case studies, a multicore SoC model developed within the within the GEM5 environment, and a cycle accurate register transfer level model of a similar SoC design.

Enforcing Security Policies On Gpu Computing Through The Use Of Aspect-Oriented Programming Techniques, Bader Albassam

USF Tampa Graduate Theses and Dissertations

This thesis presents a new security policy enforcer designed for securing parallel computation on CUDA GPUs. We show how the very features that make a GPGPU desirable have already been utilized in existing exploits, fortifying the need for security protections on a GPGPU. An aspect weaver was designed for CUDA with the goal of utilizing aspect-oriented programming for security policy enforcement. Empirical testing verified the ability of our aspect weaver to enforce various policies. Furthermore, a performance analysis was performed to demonstrate that using this policy enforcer provides no significant performance impact over manual insertion of policy code. Finally, future …

Design Exploration And Application Of Reversible Circuits In Emerging Technologies, Saurabh Kotiyal

USF Tampa Graduate Theses and Dissertations

The reversible logic has promising applications in emerging computing paradigms, such as quantum computing, quantum dot cellular automata, optical computing, etc. In reversible logic gates, there is a unique one-to-one mapping between the inputs and outputs. To generate a useful gate function, the reversible gates require some constant ancillary inputs called ancilla inputs. Also to maintain the reversibility of the circuits some additional unused outputs are required that are referred to as the garbage outputs. The number of ancilla inputs, the number of garbage outputs and quantum cost plays an important role in the evaluation of reversible circuits. Thus minimizing …