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Full-Text Articles in Computer Engineering
Tailored Systems Architecture For Design Of Space Science And Technology Missions Using Dodaf V2.0, Nicholas J. Merski
Tailored Systems Architecture For Design Of Space Science And Technology Missions Using Dodaf V2.0, Nicholas J. Merski
Theses and Dissertations
The use of systems architecture, following a set of integrated descriptions from an architecture framework, has been well codified in Department of Defense acquisition and systems engineering. However, in the Space Science and Technology (S&T) community, this guidance and practice is not commonly adopted. This paper outlines an approach to leverage the changes made in DoD Architecture Framework 2.0 (DoDAF2.0), and the renewed emphasis on data and support to acquisition decision analysis. After decomposing the Space S&T design lifecycle into phases, design milestones and activities using process models, a set of DoDAF prescribed and Fit-for-Purpose views are constructed into a …
Methodology For Value-Driven Enterprise Architecture Development Goals: Application To Dodaf Framework, Justin W. Osgood
Methodology For Value-Driven Enterprise Architecture Development Goals: Application To Dodaf Framework, Justin W. Osgood
Theses and Dissertations
The Department of Defense Architectural Framework (DoDAF) describes 29 distinct views but offers limited guidance on view selection to meet system needs. This research extends the Value-Driven Enterprise Architecture Score (VDEA-Score) from a descriptive, evaluation protocol toward a prescriptive one by evaluating each DoDAF view and its contribution to the overall objective of the completed architecture. This extension of VDEA is referred to as VDEA-Development Goals (VDEA-DG). The program manager or other decision-makers may use this insight to justify the allocation of resources to the development of specific architecture views considered to provide maximum value. This research provides insight into …
Exploring Hardware Based Primitives To Enhance Parallel Security Monitoring In A Novel Computing Architecture, Stephen D. Mott
Exploring Hardware Based Primitives To Enhance Parallel Security Monitoring In A Novel Computing Architecture, Stephen D. Mott
Theses and Dissertations
This research explores how hardware-based primitives can be implemented to perform security-related monitoring in real-time, offer better security, and increase performance compared to software-based approaches. In doing this, we propose a novel computing architecture, derived from a contemporary shared memory architecture, that facilitates efficient security-related monitoring in real-time, while keeping the monitoring hardware itself safe from attack. This architecture is flexible, allowing security to be tailored based on the needs of the system. We have developed a number of hardware-based primitives that fit into this architecture to provide a wide array of monitoring capabilities. A number of these primitives provide …
Fault And Defect Tolerant Computer Architectures: Reliable Computing With Unreliable Devices, George R. Roelke Iv
Fault And Defect Tolerant Computer Architectures: Reliable Computing With Unreliable Devices, George R. Roelke Iv
Theses and Dissertations
This research addresses design of a reliable computer from unreliable device technologies. A system architecture is developed for a "fault and defect tolerant" (FDT) computer. Trade-offs between different techniques are studied and yield and hardware cost models are developed. Fault and defect tolerant designs are created for the processor and the cache memory. Simulation results for the content-addressable memory (CAM)-based cache show 90% yield with device failure probabilities of 3 x 10(-6), three orders of magnitude better than non fault tolerant caches of the same size. The entire processor achieves 70% yield with device failure probabilities exceeding 10(-6). The required …
A Reconfigurable Superscalar Architecture, Christopher B. Mayer
A Reconfigurable Superscalar Architecture, Christopher B. Mayer
Theses and Dissertations
The invention of the Field Programmable Gate Array (FPGA) has led to a number of interesting developments. One is the idea of providing custom hardware support for applications running on a computer. These reconfigurable computers have been shown to decrease the execution time for some applications. Based on past results, attention has subsequently turned to using reconfigurable computing in general-purpose computers (e.g. desktop and workstation environments). This thesis develops a design for just such a computer. The design, FPGADLX, is based on a hypothetical superscalar computer running the DLX instruction set and is generic enough in principle to be adapted …