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Articles 1 - 3 of 3
Full-Text Articles in Computer Engineering
Analyzing Instructtion Based Cache Replacement Policies, Ping Xiang
Analyzing Instructtion Based Cache Replacement Policies, Ping Xiang
Electronic Theses and Dissertations
The increasing speed gap between microprocessors and off-chip DRAM makes last-level caches (LLCs) a critical component for computer performance. Multi core processors aggravate the problem since multiple processor cores compete for the LLC. As a result, LLCs typically consume a significant amount of the die area and effective utilization of LLCs is mandatory for both performance and power efficiency. We present a novel replacement policy for last-level caches (LLCs). The fundamental observation is to view LLCs as a shared resource among multiple address streams with each stream being generated by a static memory access instruction. The management of LLCs in …
Episodic Memory Model For Embodied Conversational Agents, Miguel Elvir
Episodic Memory Model For Embodied Conversational Agents, Miguel Elvir
Electronic Theses and Dissertations
Embodied Conversational Agents (ECA) form part of a range of virtual characters whose intended purpose include engaging in natural conversations with human users. While works in literature are ripe with descriptions of attempts at producing viable ECA architectures, few authors have addressed the role of episodic memory models in conversational agents. This form of memory, which provides a sense of autobiographic record-keeping in humans, has only recently been peripherally integrated into dialog management tools for ECAs. In our work, we propose to take a closer look at the shared characteristics of episodic memory models in recent examples from the field. …
Improving Performance And Programmer Productivity For I/O-Intensive High Performance Computing Applications, Saba Sehrish
Improving Performance And Programmer Productivity For I/O-Intensive High Performance Computing Applications, Saba Sehrish
Electronic Theses and Dissertations
Due to the explosive growth in the size of scientific data sets, data-intensive computing is an emerging trend in computational science. HPC applications are generating and processing large amount of data ranging from terabytes (TB) to petabytes (PB). This new trend of growth in data for HPC applications has imposed challenges as to what is an appropriate parallel programming framework to efficiently process large data sets. In this work, we study the applicability of two programming models (MPI/MPI-IO and MapReduce) to a variety of I/O-intensive HPC applications ranging from simulations to analytics. We identify several performance and programmer productivity related …