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Development And Evaluation Of A Simultaneous Multithreading Processor Simulator, Carla Verena S. Nunez
Development And Evaluation Of A Simultaneous Multithreading Processor Simulator, Carla Verena S. Nunez
Theses
Modem processors are designed to achieve greater amounts of instruction level parallelism (ILP) and thread level parallelism (TLP). Simultaneous multithreading (SMT) is an architecture that exploits both LLP and TLP. It improves the utilization of the processor resources by allowing multiple independent threads to reside in the pipeline and dynamically scheduling the available resources among the threads.
The first part of this thesis presents the development of a simultaneous multithreading processor simulator. The SMT simulator is derived from SimpleScalar, a superscalar processor simulator widely used in the computer architecture research field. The basic pipeline is expanded to allow multiple threads …