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Computer Engineering Commons

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Mechanical Engineering

2018

0.18-um CMOS Technology

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Full-Text Articles in Computer Engineering

A 2.3/3.3-Ghz Dual Band Low Noise Amplifier Using Switchable Load Inductor In 0.18-Um Cmos Technology, Taufiq Alif Kurniawan, Hsiao-Chin Chen Dec 2018

A 2.3/3.3-Ghz Dual Band Low Noise Amplifier Using Switchable Load Inductor In 0.18-Um Cmos Technology, Taufiq Alif Kurniawan, Hsiao-Chin Chen

Makara Journal of Technology

In this paper, the dual band low noise amplifier is designed in 0.18-μm CMOS technology. By combining the proposed switchable load inductor for gain controlling and the conventional inductive source degeneration topology, narrow band gain and good impedance matching are achieved at 2.3/3.3-GHz frequency bands. The new mathematical analysis of low noise amplifier design is derived to define the component parameters of the proposed circuits. The proposed low noise amplifier exhibits gain of 17.18 dB and 15.5 dB, and noise figure of 2.67 dB and 2.52 dB at the two frequency bands, respectively.