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Articles 1 - 6 of 6
Full-Text Articles in Computer Engineering
Towards Qos-Based Embedded Machine Learning, Tom Springer, Erik Linstead, Peiyi Zhao, Chelsea Parlett-Pelleriti
Towards Qos-Based Embedded Machine Learning, Tom Springer, Erik Linstead, Peiyi Zhao, Chelsea Parlett-Pelleriti
Engineering Faculty Articles and Research
Due to various breakthroughs and advancements in machine learning and computer architectures, machine learning models are beginning to proliferate through embedded platforms. Some of these machine learning models cover a range of applications including computer vision, speech recognition, healthcare efficiency, industrial IoT, robotics and many more. However, there is a critical limitation in implementing ML algorithms efficiently on embedded platforms: the computational and memory expense of many machine learning models can make them unsuitable in resource-constrained environments. Therefore, to efficiently implement these memory-intensive and computationally expensive algorithms in an embedded computing environment, innovative resource management techniques are required at the …
Cognality Vr: Exploring A Mobile Vr App With Multiple Stakeholders To Reduce Meltdowns In Autistic Children, Louanne E. Boyd, Espen Garner, Ian Kim, Gianna Valencia
Cognality Vr: Exploring A Mobile Vr App With Multiple Stakeholders To Reduce Meltdowns In Autistic Children, Louanne E. Boyd, Espen Garner, Ian Kim, Gianna Valencia
Engineering Faculty Articles and Research
Many autistic children can have difficulty communicating, understanding others, and interacting with new and unfamiliar environments. At times they may suffer from a meltdown. The major contributing factor to meltdowns is sensory overwhelm. Technological solutions have shown promise in improving the quality of life for autistic children-however little exists to manage meltdowns. In this work with stakeholders, we design and deploy a low cost, mobile VR application to provide relief during sensory discomfort. Through the analysis of surveys from 88 stakeholders from a variety of groups (i.e., autistic adults, children with autism, parents of autistic individuals, and medical practitioners), we …
Online Laboratory Course Using Low Tech Supplies To Introduce Digital Logic Design Concepts, Dhanya Nair
Online Laboratory Course Using Low Tech Supplies To Introduce Digital Logic Design Concepts, Dhanya Nair
Engineering Faculty Articles and Research
This paper describes a Digital Logic Design Laboratory Course developed to engage students with hardware systems within an online setting. This is a junior level core course for students from Computer Science (CS), Computer Engineering (CE) and Electrical Engineering (EE). Hence, the laboratories are designed to provide the hands-on experience of breadboarding, testing and debugging essential to CE and EE while accommodating CS students with no prior hardware experience. Commercially available low-cost electronic trainers (portable workstations) are loaned to the students in addition to basic electronic components. To ensure a strong foundation in debugging, prior to utilizing these workstations, students …
On-Device Deep Learning Inference For System-On-Chip (Soc) Architectures, Tom Springer, Elia Eiroa-Lledo, Elizabeth Stevens, Erik Linstead
On-Device Deep Learning Inference For System-On-Chip (Soc) Architectures, Tom Springer, Elia Eiroa-Lledo, Elizabeth Stevens, Erik Linstead
Engineering Faculty Articles and Research
As machine learning becomes ubiquitous, the need to deploy models on real-time, embedded systems will become increasingly critical. This is especially true for deep learning solutions, whose large models pose interesting challenges for target architectures at the “edge” that are resource-constrained. The realization of machine learning, and deep learning, is being driven by the availability of specialized hardware, such as system-on-chip solutions, which provide some alleviation of constraints. Equally important, however, are the operating systems that run on this hardware, and specifically the ability to leverage commercial real-time operating systems which, unlike general purpose operating systems such as Linux, can …
Supporting Self-Regulation Of Children With Adhd Using Wearables: Tensions And Design Challenges, Franceli L. Cibrian, Kimberley D. Lakes, Arya Tavakoulnia, Kayla Guzman, Sabrina Schuck, Gillian R. Hayes
Supporting Self-Regulation Of Children With Adhd Using Wearables: Tensions And Design Challenges, Franceli L. Cibrian, Kimberley D. Lakes, Arya Tavakoulnia, Kayla Guzman, Sabrina Schuck, Gillian R. Hayes
Engineering Faculty Articles and Research
The design of wearable applications supporting children with Attention Deficit Hyperactivity Disorders (ADHD) requires a deep understanding not only of what is possible from a clinical standpoint but also how the children might understand and orient towards wearable technologies, such as a smartwatch. Through a series of participatory design workshops with children with ADHD and their caregivers, we identified tensions and challenges in designing wearable applications supporting the self-regulation of children with ADHD. In this paper, we describe the specific challenges of smartwatches for this population, the balance between self-regulation and co-regulation, and tensions when receiving notifications on a smartwatch …
Low-Energy Acceleration Of Binarized Convolutional Neural Networks Using A Spin Hall Effect Based Logic-In-Memory Architecture, Ashkan Samiee, Payal Borulkar, Ronald F. Demara, Peiyi Zhao, Yu Bai
Low-Energy Acceleration Of Binarized Convolutional Neural Networks Using A Spin Hall Effect Based Logic-In-Memory Architecture, Ashkan Samiee, Payal Borulkar, Ronald F. Demara, Peiyi Zhao, Yu Bai
Engineering Faculty Articles and Research
Deep Learning (DL) offers the advantages of high accuracy performance at tasks such as image recognition, learning of complex intelligent behaviors, and large-scale information retrieval problems such as intelligent web search. To attain the benefits of DL, the high computational and energy-consumption demands imposed by the underlying processing, interconnect, and memory devices on which software-based DL executes can benefit substantially from innovative hardware implementations. Logic-in-Memory (LIM) architectures offer potential approaches to attaining such throughput goals within area and energy constraints starting with the lowest layers of the hardware stack. In this paper, we develop a Spintronic Logic-in-Memory (S-LIM) XNOR neural …