Computer Engineering Commons^™

On-Chip Training Of Memristor Crossbar Based Multi-Layer Neural Networks, Raqibul Hasan, Tarek M. Taha, Christopher Yakopcic

Electrical and Computer Engineering Faculty Publications

Memristor crossbar arrays carry out multiply-add operations in parallel in the analog domain, and so can enable neuromorphic systems with high throughput at low energy and area consumption. On-chip training of these systems have the significant advantage of being able to get around device variability and faults. This paper presents on-chip training circuits for multi-layer neural networks implemented using a single crossbar per layer and two memristors per synapse. Using two memristors per synapse provides double the synaptic weight precision when compared to a design that uses only one memristor per synapse. Proposed on-chip training system utilizes the back propagation …