Computer Engineering Commons^™

Design Of Hardware To Aid Smartphone-Based Oscilloscope App, Riddock Moran

Honors Theses

A smartphone-based oscilloscope improves on traditional lab oscilloscopes in accessibility and portability but faces several performance limitations compared to traditional oscilloscopes. Among these, an oscilloscope app that uses the phone’s audio to read voltage signals will have a sampling rate and voltage bottlenecked by the capabilities of the audio codec, which will rarely exceed a rate of 48 kHz and 1 volt, respectively. Additionally, smartphones lack the ability to read line-in audio, allowing only one channel input through the microphone. Direct connections to an audio source may not be possible due to requiring an audio jack connection, and different poles …

Structural Checking Tool Restructure And Matching Improvements, Derek Taylor

Graduate Theses and Dissertations

With the rising complexity and size of hardware designs, saving development time and cost by employing third-party intellectual property (IP) into various first-party designs has become a necessity. However, using third-party IPs introduces the risk of adding malicious behavior to the design, including hardware Trojans. Different from software Trojan detection, the detection of hardware Trojans in an efficient and cost-effective manner is an ongoing area of study and has significant complexities depending on the development stage where Trojan detection is leveraged. Therefore, this thesis research proposes improvements to various components of the soft IP analysis methodology utilized by the Structural …

A Precise Dispenser Design For Canine Cognition Research, Walker Arce, Jeffrey R. Stevens

Department of Electrical and Computer Engineering: Faculty Publications

Some forms of canine cognition research require a dispenser that can accurately dispense precise quantities of treats. When using off-the-shelf or retrofitted dispensers, there is no guarantee that a precise number of treats will be dispensed. Often, they will over-dispense treats, which may not be acceptable for some tasks. Here we describe a 3D-printed precise treat dispenser with a 59-treat capacity driven by a stepper motor drive and controlled by an integrated Raspberry Pi. The dispenser can be built for less than 200 USD and is fully 3D printable. While off-the-shelf dispensers can result in an error rate of 20–30%, …

An Fpga-Based Hardware Accelerator For The Digital Image Correlation Engine, Keaten Stokke

Graduate Theses and Dissertations

The work presented in this thesis was aimed at the development of a hardware accelerator for the Digital Image Correlation engine (DICe) and compare two methods of data access, USB and Ethernet. The original DICe software package was created by Sandia National Laboratories and is written in C++. The software runs on any typical workstation PC and performs image correlation on available frame data produced by a camera. When DICe is introduced to a high volume of frames, the correlation time is on the order of days. The time to process and analyze data with DICe becomes a concern when …

Hardware Ip Classification Through Weighted Characteristics, Brendan Mcgeehan

Graduate Theses and Dissertations

Today’s business model for hardware designs frequently incorporates third-party Intellectual Property (IP) due to the many benefits it can bring to a company. For instance, outsourcing certain components of an overall design can reduce time-to-market by allowing each party to specialize and perfect a specific part of the overall design. However, allowing third-party involvement also increases the possibility of malicious attacks, such as hardware Trojan insertion. Trojan insertion is a particularly dangerous security threat because testing the functionality of an IP can often leave the Trojan undetected. Therefore, this thesis work provides an improvement on a Trojan detection method known …

Automated Compilation Test System For Embedded System, Mohamad Khairi Ishak, Ooi Jun Hwan, Teh Jiashen, Nor Ashidi Mat Isa

Makara Journal of Technology

Embedded system testing involves testing an integration of software and hardware. It is increasingly difficult to evaluate the functionality of each module within a short time because of the increasing number of tests required. In this paper, a novel stepwise methodology involving the use of an automated compilation test system (ACTS) is proposed, to improve the quality of testing and optimize the testing time using automation. Using the proposed method, the testing coverage can be maximized, while minimizing the manual work and testing time required. This ACTS was used to automate the test code compilation and execution for different hardware …

Compact Hardware Implementation Of A Sha-3 Core For Wireless Body Sensor Networks, Yi Yang, Debiao He, Neeraj Kumar, Sherali Zeadally

Information Science Faculty Publications

One of the most important Internet of Things applications is the wireless body sensor network (WBSN), which can provide universal health care, disease prevention, and control. Due to large deployments of small scale smart sensors in WBSNs, security, and privacy guarantees (e.g., security and safety-critical data, sensitive private information) are becoming a challenging issue because these sensor nodes communicate using an open channel, i.e., Internet. We implement data integrity (to resist against malicious tampering) using the secure hash algorithm 3 (SHA-3) when smart sensors in WBSNs communicate with each other using the Internet. Due to the limited resources (i.e., storage, …

Oracle Guided Incremental Sat Solving To Reverse Engineer Camouflaged Circuits, Xiangyu Zhang

Masters Theses

This study comprises two tasks. The first is to implement gate-level circuit camouflage techniques. The second is to implement the Oracle-guided incremental de-camouflage algorithm and apply it to the camouflaged designs.

The circuit camouflage algorithms are implemented in Python, and the Oracle- guided incremental de-camouflage algorithm is implemented in C++. During this study, I evaluate the Oracle-guided de-camouflage tool (Solver, in short) performance by de-obfuscating the ISCAS-85 combinational benchmarks, which are camouflaged by the camouflage algorithms. The results show that Solver is able to efficiently de-obfuscate the ISCAS-85 benchmarks regardless of camouflaging style, and is able to do so 10.5x …

Solid State Drive, Shaun A. Steele

Electrical Engineering

This project documents the design and implementation of a solid state drive (SSD). SSDs are a non-volatile memory storage device that competes with hard disk drives. SSDs rely on flash memory, a type of non-volatile memory that is electrically erased and programmed. The appeal of SSDs lies in the fact that they allow a fast, reliable, and durable memory storage device. The goal of this project is to have a working external SSD built from scratch.

Hardware Design Theory (Using Raspberry Pi), Anthony Kelly, Thomas Blum Dr.

Undergraduate Research

The concept for this research proposal is focused on achieving three main objectives:

1) To understand the logic and design behind the Raspberry Pi (RbP) mini-computer model, including: all hardware components and their functions, the capabilities [and limits] of the RbP, and the circuit engineering for these components.

2) To be able to, using the Python high-level language, duplicate, manipulate, and create RbP projects ranging from basic user-input and response systems to the theories behind more intricate and complicated observatory sensors.

3) Simultaneously, in order to combine a mutual shared interest of History and to blend in work done within …

Design Of An Open-Source Sata Core For Virtex-4 Fpgas, Cory Gorman

Masters Theses 1911 - February 2014

Many hard drives manufactured today use the Serial ATA (SATA) protocol to communicate with the host machine, typically a PC. SATA is a much faster and much more robust protocol than its predecessor, ATA (also referred to as Parallel ATA or IDE). Many hardware designs, including those using Field-Programmable Gate Arrays (FPGAs), have a need for a long-term storage solution, and a hard drive would be ideal. One such design is the high-speed Data Acquisition System (DAS) created for the NASA Surface Water and Ocean Topography mission. This system utilizes a Xilinx Virtex-4 FPGA. Although the DAS includes a SATA …

Investigation Of The Divcon Neuron To Increase The Performance Of A Traditional Feed Forward Multi-Layer Perceptron And Its Hardware Implementation, Jovan Saenz

Open Access Theses & Dissertations

ABSTRACT

Artificial Neural Networks (ANNs) have been developed in an attempt to emulate the information processing capabilities of the biological brain. They offer an alternate computing approach to problems in which mathematical modeling is complicated, such as pattern recognition and pattern classification.

Since ANNs were proposed in the early 1940s, there has been a great amount of research effort dedicated to the development of new models that improve performance. Consequently, different architectures, a variety of activation functions, and distinct learning algorithms have been developed and implemented in different disciplines such as medicine, engineering, and science. In addition, ANNs have been …